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avcodec/x86/hevc: add avx2 dc idct
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
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a30f1b15c7
commit
942e22c651
@ -20,12 +20,12 @@
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; */
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; */
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%include "libavutil/x86/x86util.asm"
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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SECTION_RODATA 32
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max_pixels_10: times 8 dw ((1 << 10)-1)
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max_pixels_10: times 16 dw ((1 << 10)-1)
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dc_add_10: times 4 dd ((1 << 14-10) + 1)
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dc_add_10: times 4 dd ((1 << 14-10) + 1)
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SECTION .text
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SECTION_TEXT 32
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;the idct_dc_add macros and functions were largely inspired by x264 project's code in the h264_idct.asm file
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;the idct_dc_add macros and functions were largely inspired by x264 project's code in the h264_idct.asm file
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@ -41,6 +41,18 @@ SECTION .text
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packuswb m1, m1
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packuswb m1, m1
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%endmacro
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%endmacro
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%macro DC_ADD_INIT_AVX2 2
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add %1w, ((1 << 14-8) + 1)
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sar %1w, (15-8)
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movd xm0, %1d
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vpbroadcastw m0, xm0 ;SPLATW
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lea %1, [%2*3]
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pxor m1, m1
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psubw m1, m0
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packuswb m0, m0
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packuswb m1, m1
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%endmacro
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%macro DC_ADD_OP 4
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%macro DC_ADD_OP 4
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%1 m2, [%2 ]
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%1 m2, [%2 ]
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%1 m3, [%2+%3 ]
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%1 m3, [%2+%3 ]
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@ -112,6 +124,19 @@ cglobal hevc_idct16_dc_add_8, 3, 4, 0
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DC_ADD_OP mova, r0, r2, r3
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DC_ADD_OP mova, r0, r2, r3
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RET
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RET
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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; void ff_hevc_idct32_dc_add_8_avx2(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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cglobal hevc_idct32_dc_add_8, 3, 4, 6
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movsx r3, word [r1]
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DC_ADD_INIT_AVX2 r3, r2
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DC_ADD_OP mova, r0, r2, r3,
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%rep 7
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lea r0, [r0+r2*4]
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DC_ADD_OP mova, r0, r2, r3
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%endrep
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RET
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%endif ;HAVE_AVX2_EXTERNAL
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;-----------------------------------------------------------------------------
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;-----------------------------------------------------------------------------
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; void ff_hevc_idct_dc_add_10(pixel *dst, int16_t *block, int stride)
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; void ff_hevc_idct_dc_add_10(pixel *dst, int16_t *block, int stride)
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;-----------------------------------------------------------------------------
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;-----------------------------------------------------------------------------
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@ -178,3 +203,23 @@ IDCT8_DC_ADD
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INIT_XMM avx
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INIT_XMM avx
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IDCT8_DC_ADD
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IDCT8_DC_ADD
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%endif
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%endif
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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cglobal hevc_idct16_dc_add_10,3,4,7
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mov r1w, [r1]
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add r1w, ((1 << 4) + 1)
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sar r1w, 5
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movd xm0, r1d
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lea r1, [r2*3]
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vpbroadcastw m0, xm0 ;SPLATW
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mova m6, [max_pixels_10]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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lea r0, [r0+r2*4]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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lea r0, [r0+r2*4]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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lea r0, [r0+r2*4]
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IDCT_DC_ADD_OP_10 r0, r2, r1
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RET
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%endif ;HAVE_AVX_EXTERNAL
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@ -133,6 +133,8 @@ idct_dc_proto(8, 8,mmxext);
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idct_dc_proto(16,8, sse2);
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idct_dc_proto(16,8, sse2);
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idct_dc_proto(32,8, sse2);
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idct_dc_proto(32,8, sse2);
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idct_dc_proto(32,8, avx2);
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idct_dc_proto(4, 10,mmxext);
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idct_dc_proto(4, 10,mmxext);
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idct_dc_proto(8, 10, sse2);
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idct_dc_proto(8, 10, sse2);
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@ -142,6 +144,10 @@ idct_dc_proto(8, 10, avx);
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idct_dc_proto(16,10, avx);
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idct_dc_proto(16,10, avx);
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idct_dc_proto(32,10, avx);
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idct_dc_proto(32,10, avx);
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idct_dc_proto(16,10, avx2);
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idct_dc_proto(32,10, avx2);
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@ -92,6 +92,17 @@ void ff_hevc_idct32_dc_add_10_avx(uint8_t *dst, int16_t *coeffs, ptrdiff_t strid
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}
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}
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#endif //HAVE_AVX_EXTERNAL
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#endif //HAVE_AVX_EXTERNAL
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#if HAVE_AVX2_EXTERNAL
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void ff_hevc_idct32_dc_add_10_avx2(uint8_t *dst, int16_t *coeffs, ptrdiff_t stride)
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{
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ff_hevc_idct16_dc_add_10_avx2(dst, coeffs, stride);
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ff_hevc_idct16_dc_add_10_avx2(dst+32, coeffs, stride);
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ff_hevc_idct16_dc_add_10_avx2(dst+16*stride, coeffs, stride);
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ff_hevc_idct16_dc_add_10_avx2(dst+16*stride+32, coeffs, stride);
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}
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#endif //HAVE_AVX2_EXTERNAL
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#define mc_rep_func(name, bitd, step, W, opt) \
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#define mc_rep_func(name, bitd, step, W, opt) \
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void ff_hevc_put_hevc_##name##W##_##bitd##_##opt(int16_t *_dst, ptrdiff_t dststride, \
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void ff_hevc_put_hevc_##name##W##_##bitd##_##opt(int16_t *_dst, ptrdiff_t dststride, \
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uint8_t *_src, ptrdiff_t _srcstride, int height, \
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uint8_t *_src, ptrdiff_t _srcstride, int height, \
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@ -438,6 +449,9 @@ void ff_hevcdsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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QPEL_LINKS(c->put_hevc_qpel, 1, 0, qpel_v, 8, sse4);
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QPEL_LINKS(c->put_hevc_qpel, 1, 0, qpel_v, 8, sse4);
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QPEL_LINKS(c->put_hevc_qpel, 1, 1, qpel_hv, 8, sse4);
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QPEL_LINKS(c->put_hevc_qpel, 1, 1, qpel_hv, 8, sse4);
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}
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}
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if (EXTERNAL_AVX2(mm_flags)) {
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c->transform_dc_add[3] = ff_hevc_idct32_dc_add_8_avx2;
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}
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} else if (bit_depth == 10) {
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} else if (bit_depth == 10) {
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if (EXTERNAL_MMXEXT(mm_flags)) {
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if (EXTERNAL_MMXEXT(mm_flags)) {
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c->transform_dc_add[0] = ff_hevc_idct4_dc_add_10_mmxext;
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c->transform_dc_add[0] = ff_hevc_idct4_dc_add_10_mmxext;
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@ -473,6 +487,10 @@ void ff_hevcdsp_init_x86(HEVCDSPContext *c, const int bit_depth)
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c->transform_dc_add[2] = ff_hevc_idct16_dc_add_10_avx;
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c->transform_dc_add[2] = ff_hevc_idct16_dc_add_10_avx;
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c->transform_dc_add[3] = ff_hevc_idct32_dc_add_10_avx;
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c->transform_dc_add[3] = ff_hevc_idct32_dc_add_10_avx;
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}
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}
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if (EXTERNAL_AVX2(mm_flags)) {
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c->transform_dc_add[2] = ff_hevc_idct16_dc_add_10_avx2;
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c->transform_dc_add[3] = ff_hevc_idct32_dc_add_10_avx2;
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}
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}
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}
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}
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}
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