mirror of https://git.ffmpeg.org/ffmpeg.git
x86: check for AVX support
This adds configure and runtime checks for AVX support on x86 CPUs. Signed-off-by: Mans Rullgard <mans@mansr.com>
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74d6871d62
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@ -222,6 +222,7 @@ Advanced options (experts only):
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--disable-mmx2 disable MMX2 optimizations
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--disable-mmx2 disable MMX2 optimizations
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--disable-sse disable SSE optimizations
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--disable-sse disable SSE optimizations
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--disable-ssse3 disable SSSE3 optimizations
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--disable-ssse3 disable SSSE3 optimizations
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--disable-avx disable AVX optimizations
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--disable-armv5te disable armv5te optimizations
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--disable-armv5te disable armv5te optimizations
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--disable-armv6 disable armv6 optimizations
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--disable-armv6 disable armv6 optimizations
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--disable-armv6t2 disable armv6t2 optimizations
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--disable-armv6t2 disable armv6t2 optimizations
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@ -975,6 +976,7 @@ ARCH_EXT_LIST='
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armv6
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armv6
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armv6t2
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armv6t2
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armvfp
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armvfp
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avx
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iwmmxt
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iwmmxt
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mmi
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mmi
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mmx
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mmx
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@ -1183,6 +1185,7 @@ mmx_deps="x86"
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mmx2_deps="mmx"
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mmx2_deps="mmx"
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sse_deps="mmx"
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sse_deps="mmx"
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ssse3_deps="sse"
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ssse3_deps="sse"
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avx_deps="ssse3"
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aligned_stack_if_any="ppc x86"
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aligned_stack_if_any="ppc x86"
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fast_64bit_if_any="alpha ia64 mips64 parisc64 ppc64 sparc64 x86_64"
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fast_64bit_if_any="alpha ia64 mips64 parisc64 ppc64 sparc64 x86_64"
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@ -2676,6 +2679,7 @@ EOF
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check_yasm "pextrd [eax], xmm0, 1" && enable yasm ||
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check_yasm "pextrd [eax], xmm0, 1" && enable yasm ||
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die "yasm not found, use --disable-yasm for a crippled build"
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die "yasm not found, use --disable-yasm for a crippled build"
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check_yasm "vpaddw xmm0, xmm0, xmm0" || disable avx
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fi
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fi
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case "$cpu" in
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case "$cpu" in
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@ -44,7 +44,7 @@ int main(void)
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int cpu_flags = av_get_cpu_flags();
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int cpu_flags = av_get_cpu_flags();
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printf("cpu_flags = 0x%08X\n", cpu_flags);
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printf("cpu_flags = 0x%08X\n", cpu_flags);
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printf("cpu_flags = %s%s%s%s%s%s%s%s%s%s%s%s\n",
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printf("cpu_flags = %s%s%s%s%s%s%s%s%s%s%s%s%s\n",
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#if ARCH_ARM
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#if ARCH_ARM
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cpu_flags & AV_CPU_FLAG_IWMMXT ? "IWMMXT " : "",
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cpu_flags & AV_CPU_FLAG_IWMMXT ? "IWMMXT " : "",
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#elif ARCH_PPC
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#elif ARCH_PPC
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@ -60,6 +60,7 @@ int main(void)
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cpu_flags & AV_CPU_FLAG_SSSE3 ? "SSSE3 " : "",
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cpu_flags & AV_CPU_FLAG_SSSE3 ? "SSSE3 " : "",
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cpu_flags & AV_CPU_FLAG_SSE4 ? "SSE4.1 " : "",
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cpu_flags & AV_CPU_FLAG_SSE4 ? "SSE4.1 " : "",
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cpu_flags & AV_CPU_FLAG_SSE42 ? "SSE4.2 " : "",
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cpu_flags & AV_CPU_FLAG_SSE42 ? "SSE4.2 " : "",
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cpu_flags & AV_CPU_FLAG_AVX ? "AVX " : "",
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cpu_flags & AV_CPU_FLAG_3DNOW ? "3DNow " : "",
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cpu_flags & AV_CPU_FLAG_3DNOW ? "3DNow " : "",
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cpu_flags & AV_CPU_FLAG_3DNOWEXT ? "3DNowExt " : "");
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cpu_flags & AV_CPU_FLAG_3DNOWEXT ? "3DNowExt " : "");
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#endif
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#endif
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@ -36,6 +36,7 @@
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#define AV_CPU_FLAG_SSSE3 0x0080 ///< Conroe SSSE3 functions
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#define AV_CPU_FLAG_SSSE3 0x0080 ///< Conroe SSSE3 functions
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#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
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#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
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#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
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#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
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#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used
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#define AV_CPU_FLAG_IWMMXT 0x0100 ///< XScale IWMMXT
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#define AV_CPU_FLAG_IWMMXT 0x0100 ///< XScale IWMMXT
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#define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
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#define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
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@ -35,6 +35,9 @@
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"=c" (ecx), "=d" (edx)\
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"=c" (ecx), "=d" (edx)\
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: "0" (index));
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: "0" (index));
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#define xgetbv(index,eax,edx) \
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__asm__ ("xgetbv" : "=a"(eax), "=d"(edx) : "c" (index))
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/* Function to test if multimedia instructions are supported... */
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/* Function to test if multimedia instructions are supported... */
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int ff_get_cpu_flags_x86(void)
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int ff_get_cpu_flags_x86(void)
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{
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{
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@ -93,6 +96,15 @@ int ff_get_cpu_flags_x86(void)
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rval |= AV_CPU_FLAG_SSE4;
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rval |= AV_CPU_FLAG_SSE4;
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if (ecx & 0x00100000 )
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if (ecx & 0x00100000 )
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rval |= AV_CPU_FLAG_SSE42;
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rval |= AV_CPU_FLAG_SSE42;
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#if HAVE_AVX
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/* Check OXSAVE and AVX bits */
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if ((ecx & 0x18000000) == 0x18000000) {
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/* Check for OS support */
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xgetbv(0, eax, edx);
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if ((eax & 0x6) == 0x6)
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rval |= AV_CPU_FLAG_AVX;
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}
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#endif
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#endif
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#endif
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;
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;
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}
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}
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