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lavu/tx: make slow ISA extension penalties smarter
Instead of having a fixed -64 prio penalty, make the penalties more granular. As the prio is based on the register size in bits, decrementing it by 129 makes AVX SLOW functions be avoided in favor of any SSE versions.
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@ -469,6 +469,15 @@ av_cold int ff_tx_init_subtx(AVTXContext *s, enum AVTXType type,
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AV_CPU_FLAG_ATOM | AV_CPU_FLAG_SSSE3SLOW |
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AV_CPU_FLAG_AVXSLOW | AV_CPU_FLAG_SLOW_GATHER;
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static const int slow_penalties[][2] = {
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{ AV_CPU_FLAG_SSE2SLOW, 1 + 64 },
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{ AV_CPU_FLAG_SSE3SLOW, 1 + 64 },
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{ AV_CPU_FLAG_SSSE3SLOW, 1 + 64 },
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{ AV_CPU_FLAG_ATOM, 1 + 128 },
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{ AV_CPU_FLAG_AVXSLOW, 1 + 128 },
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{ AV_CPU_FLAG_SLOW_GATHER, 1 + 32 },
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};
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/* Flags the transform wants */
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uint64_t req_flags = flags;
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@ -535,8 +544,10 @@ av_cold int ff_tx_init_subtx(AVTXContext *s, enum AVTXType type,
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/* If the CPU has a SLOW flag, and the instruction is also flagged
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* as being slow for such, reduce its priority */
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if ((cpu_flags & cd->cpu_flags) & slow_mask)
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cd_matches[nb_cd_matches].prio -= 64;
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for (int i = 0; i < FF_ARRAY_ELEMS(slow_penalties); i++) {
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if ((cpu_flags & cd->cpu_flags) & slow_penalties[i][0])
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cd_matches[nb_cd_matches].prio -= slow_penalties[i][1];
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}
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/* Prioritize aligned-only codelets */
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if ((cd->flags & FF_TX_ALIGNED) && !(cd->flags & AV_TX_UNALIGNED))
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