mirror of https://git.ffmpeg.org/ffmpeg.git
fmtconvert: port float_to_int16() x86 inline asm to yasm
This commit is contained in:
Justin Ruggles
parent
45add995de
commit
708ab7dd69
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@ -24,6 +24,48 @@
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SECTION_TEXT
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;------------------------------------------------------------------------------
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; void ff_float_to_int16(int16_t *dst, const float *src, long len);
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;------------------------------------------------------------------------------
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%macro FLOAT_TO_INT16 2
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cglobal float_to_int16_%1, 3,3,%2, dst, src, len
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add lenq, lenq
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lea srcq, [srcq+2*lenq]
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add dstq, lenq
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neg lenq
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.loop:
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%ifidn %1, sse2
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cvtps2dq m0, [srcq+2*lenq ]
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cvtps2dq m1, [srcq+2*lenq+16]
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packssdw m0, m1
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mova [dstq+lenq], m0
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%else
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cvtps2pi m0, [srcq+2*lenq ]
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cvtps2pi m1, [srcq+2*lenq+ 8]
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cvtps2pi m2, [srcq+2*lenq+16]
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cvtps2pi m3, [srcq+2*lenq+24]
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packssdw m0, m1
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packssdw m2, m3
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mova [dstq+lenq ], m0
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mova [dstq+lenq+8], m2
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%endif
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add lenq, 16
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js .loop
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%ifnidn %1, sse2
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emms
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%endif
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REP_RET
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%endmacro
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INIT_XMM
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FLOAT_TO_INT16 sse2, 2
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INIT_MMX
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FLOAT_TO_INT16 sse, 0
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%define cvtps2pi pf2id
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FLOAT_TO_INT16 3dnow, 0
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%undef cvtps2pi
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%macro PSWAPD_SSE 2
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pshufw %1, %2, 0x4e
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%endmacro
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@ -70,80 +70,16 @@ static void int32_to_float_fmul_scalar_sse2(float *dst, const int *src, float mu
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);
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}
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static void float_to_int16_3dnow(int16_t *dst, const float *src, long len){
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x86_reg reglen = len;
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// not bit-exact: pf2id uses different rounding than C and SSE
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__asm__ volatile(
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"add %0 , %0 \n\t"
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"lea (%2,%0,2) , %2 \n\t"
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"add %0 , %1 \n\t"
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"neg %0 \n\t"
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"1: \n\t"
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"pf2id (%2,%0,2) , %%mm0 \n\t"
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"pf2id 8(%2,%0,2) , %%mm1 \n\t"
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"pf2id 16(%2,%0,2) , %%mm2 \n\t"
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"pf2id 24(%2,%0,2) , %%mm3 \n\t"
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"packssdw %%mm1 , %%mm0 \n\t"
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"packssdw %%mm3 , %%mm2 \n\t"
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"movq %%mm0 , (%1,%0) \n\t"
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"movq %%mm2 , 8(%1,%0) \n\t"
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"add $16 , %0 \n\t"
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" js 1b \n\t"
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"femms \n\t"
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:"+r"(reglen), "+r"(dst), "+r"(src)
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);
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}
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#if HAVE_YASM
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static void float_to_int16_sse(int16_t *dst, const float *src, long len){
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x86_reg reglen = len;
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__asm__ volatile(
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"add %0 , %0 \n\t"
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"lea (%2,%0,2) , %2 \n\t"
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"add %0 , %1 \n\t"
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"neg %0 \n\t"
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"1: \n\t"
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"cvtps2pi (%2,%0,2) , %%mm0 \n\t"
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"cvtps2pi 8(%2,%0,2) , %%mm1 \n\t"
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"cvtps2pi 16(%2,%0,2) , %%mm2 \n\t"
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"cvtps2pi 24(%2,%0,2) , %%mm3 \n\t"
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"packssdw %%mm1 , %%mm0 \n\t"
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"packssdw %%mm3 , %%mm2 \n\t"
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"movq %%mm0 , (%1,%0) \n\t"
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"movq %%mm2 , 8(%1,%0) \n\t"
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"add $16 , %0 \n\t"
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" js 1b \n\t"
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"emms \n\t"
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:"+r"(reglen), "+r"(dst), "+r"(src)
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);
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}
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static void float_to_int16_sse2(int16_t *dst, const float *src, long len){
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x86_reg reglen = len;
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__asm__ volatile(
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"add %0 , %0 \n\t"
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"lea (%2,%0,2) , %2 \n\t"
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"add %0 , %1 \n\t"
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"neg %0 \n\t"
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"1: \n\t"
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"cvtps2dq (%2,%0,2) , %%xmm0 \n\t"
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"cvtps2dq 16(%2,%0,2) , %%xmm1 \n\t"
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"packssdw %%xmm1 , %%xmm0 \n\t"
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"movdqa %%xmm0 , (%1,%0) \n\t"
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"add $16 , %0 \n\t"
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" js 1b \n\t"
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:"+r"(reglen), "+r"(dst), "+r"(src)
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);
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}
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void ff_float_to_int16_3dnow(int16_t *dst, const float *src, long len);
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void ff_float_to_int16_sse (int16_t *dst, const float *src, long len);
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void ff_float_to_int16_sse2 (int16_t *dst, const float *src, long len);
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void ff_float_to_int16_interleave6_sse(int16_t *dst, const float **src, int len);
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void ff_float_to_int16_interleave6_3dnow(int16_t *dst, const float **src, int len);
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void ff_float_to_int16_interleave6_3dn2(int16_t *dst, const float **src, int len);
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#if !HAVE_YASM
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#define ff_float_to_int16_interleave6_sse(a,b,c) float_to_int16_interleave_misc_sse(a,b,c,6)
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#define ff_float_to_int16_interleave6_3dnow(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6)
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#define ff_float_to_int16_interleave6_3dn2(a,b,c) float_to_int16_interleave_misc_3dnow(a,b,c,6)
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#endif
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#define ff_float_to_int16_interleave6_sse2 ff_float_to_int16_interleave6_sse
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#define FLOAT_TO_INT16_INTERLEAVE(cpu, body) \
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@ -152,7 +88,7 @@ static av_noinline void float_to_int16_interleave_misc_##cpu(int16_t *dst, const
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DECLARE_ALIGNED(16, int16_t, tmp)[len];\
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int i,j,c;\
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for(c=0; c<channels; c++){\
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float_to_int16_##cpu(tmp, src[c], len);\
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ff_float_to_int16_##cpu(tmp, src[c], len);\
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for(i=0, j=c; i<len; i++, j+=channels)\
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dst[j] = tmp[i];\
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}\
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@ -160,7 +96,7 @@ static av_noinline void float_to_int16_interleave_misc_##cpu(int16_t *dst, const
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\
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static void float_to_int16_interleave_##cpu(int16_t *dst, const float **src, long len, int channels){\
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if(channels==1)\
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float_to_int16_##cpu(dst, src[0], len);\
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ff_float_to_int16_##cpu(dst, src[0], len);\
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else if(channels==2){\
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x86_reg reglen = len; \
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const float *src0 = src[0];\
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@ -235,7 +171,6 @@ static void float_to_int16_interleave_3dn2(int16_t *dst, const float **src, long
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float_to_int16_interleave_3dnow(dst, src, len, channels);
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}
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#if HAVE_YASM
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void ff_float_interleave2_mmx(float *dst, const float **src, unsigned int len);
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void ff_float_interleave2_sse(float *dst, const float **src, unsigned int len);
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@ -272,11 +207,10 @@ void ff_fmt_convert_init_x86(FmtConvertContext *c, AVCodecContext *avctx)
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if (mm_flags & AV_CPU_FLAG_MMX) {
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#if HAVE_YASM
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c->float_interleave = float_interleave_mmx;
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#endif
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if(mm_flags & AV_CPU_FLAG_3DNOW){
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if(!(avctx->flags & CODEC_FLAG_BITEXACT)){
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c->float_to_int16 = float_to_int16_3dnow;
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c->float_to_int16 = ff_float_to_int16_3dnow;
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c->float_to_int16_interleave = float_to_int16_interleave_3dnow;
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}
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}
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@ -285,18 +219,21 @@ void ff_fmt_convert_init_x86(FmtConvertContext *c, AVCodecContext *avctx)
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c->float_to_int16_interleave = float_to_int16_interleave_3dn2;
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}
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}
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#endif
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if(mm_flags & AV_CPU_FLAG_SSE){
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c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse;
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c->float_to_int16 = float_to_int16_sse;
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c->float_to_int16_interleave = float_to_int16_interleave_sse;
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#if HAVE_YASM
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c->float_to_int16 = ff_float_to_int16_sse;
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c->float_to_int16_interleave = float_to_int16_interleave_sse;
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c->float_interleave = float_interleave_sse;
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#endif
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}
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if(mm_flags & AV_CPU_FLAG_SSE2){
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c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse2;
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c->float_to_int16 = float_to_int16_sse2;
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#if HAVE_YASM
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c->float_to_int16 = ff_float_to_int16_sse2;
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c->float_to_int16_interleave = float_to_int16_interleave_sse2;
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#endif
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}
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}
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}
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