mirror of https://git.ffmpeg.org/ffmpeg.git
x86/videodsp: add ff_emu_edge_{hfix,hvar}_avx2
~15% faster than sse2. Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com> Signed-off-by: James Almer <jamrial@gmail.com>
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280ef183db
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70277d1d23
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@ -97,7 +97,10 @@ cglobal emu_edge_hvar, 5, 6, 1, dst, dst_stride, start_x, n_words, h, w
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neg n_wordsq
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neg n_wordsq
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lea start_xq, [start_xq+n_wordsq*2]
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lea start_xq, [start_xq+n_wordsq*2]
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.y_loop: ; do {
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.y_loop: ; do {
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; FIXME also write a ssse3 version using pshufb
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%if cpuflag(avx2)
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vpbroadcastb m0, [dstq+start_xq]
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mov wq, n_wordsq ; initialize w
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%else
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movzx wd, byte [dstq+start_xq] ; w = read(1)
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movzx wd, byte [dstq+start_xq] ; w = read(1)
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imul wd, 0x01010101 ; w *= 0x01010101
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imul wd, 0x01010101 ; w *= 0x01010101
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movd m0, wd
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movd m0, wd
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@ -107,6 +110,7 @@ cglobal emu_edge_hvar, 5, 6, 1, dst, dst_stride, start_x, n_words, h, w
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%else ; mmx
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%else ; mmx
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punpckldq m0, m0 ; splat
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punpckldq m0, m0 ; splat
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%endif ; mmx/sse
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%endif ; mmx/sse
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%endif ; avx2
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.x_loop: ; do {
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.x_loop: ; do {
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movu [dstq+wq*2], m0 ; write($reg, $mmsize)
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movu [dstq+wq*2], m0 ; write($reg, $mmsize)
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add wq, mmsize/2 ; w -= $mmsize/2
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add wq, mmsize/2 ; w -= $mmsize/2
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@ -127,6 +131,11 @@ hvar_fn
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INIT_XMM sse2
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INIT_XMM sse2
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hvar_fn
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hvar_fn
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%if HAVE_AVX2_EXTERNAL
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INIT_XMM avx2
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hvar_fn
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%endif
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; macro to read/write a horizontal number of pixels (%2) to/from registers
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; macro to read/write a horizontal number of pixels (%2) to/from registers
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; on sse, - fills xmm0-15 for consecutive sets of 16 pixels
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; on sse, - fills xmm0-15 for consecutive sets of 16 pixels
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; - if (%2 & 8) fills 8 bytes into xmm$next
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; - if (%2 & 8) fills 8 bytes into xmm$next
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@ -344,6 +353,9 @@ VERTICAL_EXTEND 16, 22
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; obviously not the same on both sides.
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; obviously not the same on both sides.
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%macro READ_V_PIXEL 2
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%macro READ_V_PIXEL 2
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%if cpuflag(avx2)
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vpbroadcastb m0, %2
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%else
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movzx vald, byte %2
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movzx vald, byte %2
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imul vald, 0x01010101
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imul vald, 0x01010101
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%if %1 >= 8
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%if %1 >= 8
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@ -354,6 +366,7 @@ VERTICAL_EXTEND 16, 22
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punpckldq m0, m0
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punpckldq m0, m0
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%endif ; mmsize == 16
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%endif ; mmsize == 16
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%endif ; %1 > 16
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%endif ; %1 > 16
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%endif ; avx2
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%endmacro ; READ_V_PIXEL
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%endmacro ; READ_V_PIXEL
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%macro WRITE_V_PIXEL 2
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%macro WRITE_V_PIXEL 2
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@ -398,14 +411,22 @@ VERTICAL_EXTEND 16, 22
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%endif ; %1 >=/< 8
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%endif ; %1 >=/< 8
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%if %1-%%off == 2
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%if %1-%%off == 2
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%if cpuflag(avx2)
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movd [%2+%%off-2], m0
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%else
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mov [%2+%%off], valw
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mov [%2+%%off], valw
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%endif ; avx2
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%endif ; (%1-%%off)/2
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%endif ; (%1-%%off)/2
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%endmacro ; WRITE_V_PIXEL
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%endmacro ; WRITE_V_PIXEL
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%macro H_EXTEND 2
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%macro H_EXTEND 2
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%assign %%n %1
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%assign %%n %1
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%rep 1+(%2-%1)/2
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%rep 1+(%2-%1)/2
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%if cpuflag(avx2)
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cglobal emu_edge_hfix %+ %%n, 4, 4, 1, dst, dst_stride, start_x, bh
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%else
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cglobal emu_edge_hfix %+ %%n, 4, 5, 1, dst, dst_stride, start_x, bh, val
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cglobal emu_edge_hfix %+ %%n, 4, 5, 1, dst, dst_stride, start_x, bh, val
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%endif
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.loop_y: ; do {
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.loop_y: ; do {
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READ_V_PIXEL %%n, [dstq+start_xq] ; $variable_regs = read($n)
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READ_V_PIXEL %%n, [dstq+start_xq] ; $variable_regs = read($n)
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WRITE_V_PIXEL %%n, dstq ; write($variable_regs, $n)
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WRITE_V_PIXEL %%n, dstq ; write($variable_regs, $n)
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@ -426,6 +447,11 @@ H_EXTEND 16, 22
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INIT_XMM sse2
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INIT_XMM sse2
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H_EXTEND 16, 22
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H_EXTEND 16, 22
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%if HAVE_AVX2_EXTERNAL
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INIT_XMM avx2
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H_EXTEND 8, 22
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%endif
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%macro PREFETCH_FN 1
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%macro PREFETCH_FN 1
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cglobal prefetch, 3, 3, 0, buf, stride, h
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cglobal prefetch, 3, 3, 0, buf, stride, h
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.loop:
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.loop:
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@ -128,6 +128,23 @@ static emu_edge_hfix_func * const hfixtbl_sse2[11] = {
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ff_emu_edge_hfix20_sse2, ff_emu_edge_hfix22_sse2
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ff_emu_edge_hfix20_sse2, ff_emu_edge_hfix22_sse2
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};
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};
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extern emu_edge_hvar_func ff_emu_edge_hvar_sse2;
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extern emu_edge_hvar_func ff_emu_edge_hvar_sse2;
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#if HAVE_AVX2_EXTERNAL
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extern emu_edge_hfix_func ff_emu_edge_hfix8_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix10_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix12_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix14_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix16_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix18_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix20_avx2;
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extern emu_edge_hfix_func ff_emu_edge_hfix22_avx2;
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static emu_edge_hfix_func * const hfixtbl_avx2[11] = {
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ff_emu_edge_hfix2_mmx, ff_emu_edge_hfix4_mmx, ff_emu_edge_hfix6_mmx,
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ff_emu_edge_hfix8_avx2, ff_emu_edge_hfix10_avx2, ff_emu_edge_hfix12_avx2,
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ff_emu_edge_hfix14_avx2, ff_emu_edge_hfix16_avx2, ff_emu_edge_hfix18_avx2,
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ff_emu_edge_hfix20_avx2, ff_emu_edge_hfix22_avx2
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};
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extern emu_edge_hvar_func ff_emu_edge_hvar_avx2;
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#endif
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static av_always_inline void emulated_edge_mc(uint8_t *dst, const uint8_t *src,
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static av_always_inline void emulated_edge_mc(uint8_t *dst, const uint8_t *src,
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ptrdiff_t dst_stride,
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ptrdiff_t dst_stride,
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@ -238,6 +255,20 @@ static av_noinline void emulated_edge_mc_sse2(uint8_t *buf, const uint8_t *src,
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src_x, src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse,
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src_x, src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse,
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hfixtbl_sse2, &ff_emu_edge_hvar_sse2);
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hfixtbl_sse2, &ff_emu_edge_hvar_sse2);
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}
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}
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#if HAVE_AVX2_EXTERNAL
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static av_noinline void emulated_edge_mc_avx2(uint8_t *buf, const uint8_t *src,
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ptrdiff_t buf_stride,
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ptrdiff_t src_stride,
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int block_w, int block_h,
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int src_x, int src_y, int w,
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int h)
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{
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emulated_edge_mc(buf, src, buf_stride, src_stride, block_w, block_h,
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src_x, src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse,
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hfixtbl_avx2, &ff_emu_edge_hvar_avx2);
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}
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#endif /* HAVE_AVX2_EXTERNAL */
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#endif /* HAVE_YASM */
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#endif /* HAVE_YASM */
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void ff_prefetch_mmxext(uint8_t *buf, ptrdiff_t stride, int h);
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void ff_prefetch_mmxext(uint8_t *buf, ptrdiff_t stride, int h);
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@ -267,5 +298,10 @@ av_cold void ff_videodsp_init_x86(VideoDSPContext *ctx, int bpc)
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if (EXTERNAL_SSE2(cpu_flags) && bpc <= 8) {
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if (EXTERNAL_SSE2(cpu_flags) && bpc <= 8) {
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ctx->emulated_edge_mc = emulated_edge_mc_sse2;
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ctx->emulated_edge_mc = emulated_edge_mc_sse2;
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}
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}
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#if HAVE_AVX2_EXTERNAL
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if (EXTERNAL_AVX2(cpu_flags) && bpc <= 8) {
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ctx->emulated_edge_mc = emulated_edge_mc_avx2;
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}
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#endif
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#endif /* HAVE_YASM */
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#endif /* HAVE_YASM */
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}
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}
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