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fix few x86_64 registers handling

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Originally committed as revision 14557 to svn://svn.mplayerhq.hu/mplayer/trunk/postproc
This commit is contained in:
Aurelien Jacobs 2005-01-21 16:48:18 +00:00
parent 45ce5ddb89
commit 6d606c4f5b
2 changed files with 34 additions and 6 deletions
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4
postproc/swscale.c
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@ -1175,7 +1175,7 @@ static void initMMX2HScaler(int dstW, int xInc, uint8_t *funnyCode, int16_t *fil
"pshufw $0xFF, %%mm0, %%mm0 \n\t"
"2: \n\t"
"psubw %%mm1, %%mm0 \n\t"
"mov 8(%%"REG_b", %%"REG_a"), %%"REG_S"\n\t"
"movl 8(%%"REG_b", %%"REG_a"), %%esi\n\t"
"pmullw %%mm3, %%mm0 \n\t"
"psllw $7, %%mm1 \n\t"
"paddw %%mm1, %%mm0 \n\t"
@ -1213,7 +1213,7 @@ static void initMMX2HScaler(int dstW, int xInc, uint8_t *funnyCode, int16_t *fil
"pshufw $0xFF, %%mm0, %%mm0 \n\t"
"2: \n\t"
"psubw %%mm1, %%mm0 \n\t"
"mov 8(%%"REG_b", %%"REG_a"), %%"REG_S"\n\t"
"movl 8(%%"REG_b", %%"REG_a"), %%esi\n\t"
"pmullw %%mm3, %%mm0 \n\t"
"psllw $7, %%mm1 \n\t"
"paddw %%mm1, %%mm0 \n\t"

36
postproc/swscale_template.c
View File

@ -2271,13 +2271,27 @@ static inline void RENAME(hyscale)(uint16_t *dst, int dstWidth, uint8_t *src, in
PREFETCH" 32(%%"REG_c") \n\t"
PREFETCH" 64(%%"REG_c") \n\t"
#ifdef ARCH_X86_64
#define FUNNY_Y_CODE \
"mov (%%"REG_b"), %%"REG_S" \n\t"\
"movl (%%"REG_b"), %%esi \n\t"\
"call *%4 \n\t"\
"addl (%%"REG_b", %%"REG_a"), %%ecx\n\t"\
"movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\
"add %%"REG_S", %%"REG_c" \n\t"\
"add %%"REG_a", %%"REG_D" \n\t"\
"xor %%"REG_a", %%"REG_a" \n\t"\
#else
#define FUNNY_Y_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
"call *%4 \n\t"\
"addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\
"add %%"REG_a", %%"REG_D" \n\t"\
"xor %%"REG_a", %%"REG_a" \n\t"\
#endif
FUNNY_Y_CODE
FUNNY_Y_CODE
FUNNY_Y_CODE
@ -2440,13 +2454,27 @@ inline static void RENAME(hcscale)(uint16_t *dst, int dstWidth, uint8_t *src1, u
PREFETCH" 32(%%"REG_c") \n\t"
PREFETCH" 64(%%"REG_c") \n\t"
#ifdef ARCH_X86_64
#define FUNNY_UV_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
"call *%4 \n\t"\
"addl (%%"REG_b", %%"REG_a"), %%ecx\n\t"\
"movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\
"add %%"REG_S", %%"REG_c" \n\t"\
"add %%"REG_a", %%"REG_D" \n\t"\
"xor %%"REG_a", %%"REG_a" \n\t"\
#else
#define FUNNY_UV_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
"call *%4 \n\t"\
"addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\
"add %%"REG_a", %%"REG_D" \n\t"\
"xor %%"REG_a", %%"REG_a" \n\t"\
#endif
FUNNY_UV_CODE
FUNNY_UV_CODE
FUNNY_UV_CODE
@ -2466,7 +2494,7 @@ FUNNY_UV_CODE
:: "m" (src1), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos),
"m" (funnyUVCode), "m" (src2)
: "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%esi", "%"REG_D
: "%"REG_a, "%"REG_b, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D
);
for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--)
{