RepoMirrors/ffmpeg
1
0
Fork 0
mirror of https://git.ffmpeg.org/ffmpeg.git synced 2024-12-24 16:22:37 +00:00
Code Issues Projects Releases Wiki Activity

ARM: simplify inline asm with 64-bit operands

Browse Source 
Signed-off-by: Mans Rullgard <mans@mansr.com>
This commit is contained in:
Mans Rullgard 2011-05-30 16:37:06 +01:00
parent 371266daa3
commit 6bb70dfd74
2 changed files with 13 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
libavcodec/arm/mathops.h
View File

@ -59,19 +59,16 @@ static inline av_const int MULH(int a, int b)
static inline av_const int64_t MUL64(int a, int b)
{
union { uint64_t x; unsigned hl[2]; } x;
__asm__ ("smull %0, %1, %2, %3"
: "=r"(x.hl[0]), "=r"(x.hl[1]) : "r"(a), "r"(b));
return x.x;
int64_t x;
__asm__ ("smull %Q0, %R0, %1, %2" : "=r"(x) : "r"(a), "r"(b));
return x;
}
#define MUL64 MUL64
static inline av_const int64_t MAC64(int64_t d, int a, int b)
{
union { uint64_t x; unsigned hl[2]; } x = { d };
__asm__ ("smlal %0, %1, %2, %3"
: "+r"(x.hl[0]), "+r"(x.hl[1]) : "r"(a), "r"(b));
return x.x;
__asm__ ("smlal %Q0, %R0, %1, %2" : "+r"(d) : "r"(a), "r"(b));
return d;
}
#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
#define MLS64(d, a, b) MAC64(d, -(a), b)

17
libavutil/arm/intreadwrite.h
View File

@ -55,22 +55,21 @@ static av_always_inline void AV_WN32(void *p, uint32_t v)
#define AV_RN64 AV_RN64
static av_always_inline uint64_t AV_RN64(const void *p)
{
union { uint64_t v; uint32_t hl[2]; } v;
__asm__ ("ldr %0, %2 \n\t"
"ldr %1, %3 \n\t"
: "=&r"(v.hl[0]), "=r"(v.hl[1])
uint64_t v;
__asm__ ("ldr %Q0, %1 \n\t"
"ldr %R0, %2 \n\t"
: "=&r"(v)
: "m"(*(const uint32_t*)p), "m"(*((const uint32_t*)p+1)));
return v.v;
return v;
}
#define AV_WN64 AV_WN64
static av_always_inline void AV_WN64(void *p, uint64_t v)
{
union { uint64_t v; uint32_t hl[2]; } vv = { v };
__asm__ ("str %2, %0 \n\t"
"str %3, %1 \n\t"
__asm__ ("str %Q2, %0 \n\t"
"str %R2, %1 \n\t"
: "=m"(*(uint32_t*)p), "=m"(*((uint32_t*)p+1))
: "r"(vv.hl[0]), "r"(vv.hl[1]));
: "r"(v));
}
#endif /* HAVE_INLINE_ASM */