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mips: intreadwrite: fix inline asm for gcc 4.8
Just like gcc 4.6 and later on ARM, gcc 4.8 on MIPS generates inefficient code when a known-unaligned location is used as a memory input operand. This applies the same fix as has been previously done to the ARM version of the code. Signed-off-by: Mans Rullgard <mans@mansr.com>
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@ -29,12 +29,15 @@
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#define AV_RN32 AV_RN32
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static av_always_inline uint32_t AV_RN32(const void *p)
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{
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struct __attribute__((packed)) u32 { uint32_t v; };
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const uint8_t *q = p;
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const struct u32 *pl = (const struct u32 *)(q + 3 * !HAVE_BIGENDIAN);
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const struct u32 *pr = (const struct u32 *)(q + 3 * HAVE_BIGENDIAN);
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uint32_t v;
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__asm__ ("lwl %0, %1 \n\t"
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"lwr %0, %2 \n\t"
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: "=&r"(v)
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: "m"(*(const uint32_t *)((const uint8_t *)p+3*!HAVE_BIGENDIAN)),
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"m"(*(const uint32_t *)((const uint8_t *)p+3*HAVE_BIGENDIAN)));
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: "m"(*pl), "m"(*pr));
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return v;
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}
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