lavu/riscv: assembly for zicfilp LPAD

This instruction, if aligned on a 4-byte boundary, defines a valid target
("landing pad") for an indirect call or jump. Since this instruction is a
HINT, it is safe to assemble even if not included in the target
instruction set architecture.

The necessary alignment is already provided by the `func` macro. However
this still lacks the ELF attribute to indicate that the zicfilp is supported
in simple mode. This is left for future work as the ELF specification is not
ratified as of yet.

This will also nonobviously require the assembler to support zicfilp,
insofar as the `tail` pseudo-instruction shall clobber T2 (instead of T1) as
its temporary register.
This commit is contained in:
Rémi Denis-Courmont 2024-07-22 22:15:49 +03:00
parent 982376660c
commit 6319601343
1 changed files with 6 additions and 0 deletions

View File

@ -86,6 +86,12 @@
.endm
.endm
#if !defined (__riscv_zicfilp)
.macro lpad lpl
auipc zero, \lpl
.endm
#endif
#if defined (__riscv_v_elen)
# define RV_V_ELEN __riscv_v_elen
#else