mirror of https://git.ffmpeg.org/ffmpeg.git
avcodec/qsv: remove MFX_EXTBUFF_CODING_OPTION3
4th generation Intel CPUs don't support MFX_EXTBUFF_CODING_OPTION3. This patch fixes bug #5324.
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4e7a7a96cf
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5d54293668
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@ -134,9 +134,6 @@ static void dump_video_param(AVCodecContext *avctx, QSVEncContext *q,
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#if QSV_HAVE_CO2
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mfxExtCodingOption2 *co2 = (mfxExtCodingOption2*)coding_opts[1];
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#endif
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#if QSV_HAVE_CO3
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mfxExtCodingOption3 *co3 = (mfxExtCodingOption3*)coding_opts[2];
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#endif
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av_log(avctx, AV_LOG_VERBOSE, "profile: %s; level: %"PRIu16"\n",
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print_profile(info->CodecProfile), info->CodecLevel);
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@ -188,12 +185,6 @@ static void dump_video_param(AVCodecContext *avctx, QSVEncContext *q,
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info->ICQQuality, co2->LookAheadDepth);
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}
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#endif
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#if QSV_HAVE_QVBR
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else if (info->RateControlMethod == MFX_RATECONTROL_QVBR) {
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av_log(avctx, AV_LOG_VERBOSE, "QVBRQuality: %"PRIu16"\n",
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co3->QVBRQuality);
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}
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#endif
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av_log(avctx, AV_LOG_VERBOSE, "NumSlice: %"PRIu16"; NumRefFrame: %"PRIu16"\n",
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info->NumSlice, info->NumRefFrame);
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@ -573,21 +564,12 @@ static int qsv_retrieve_enc_params(AVCodecContext *avctx, QSVEncContext *q)
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.Header.BufferSz = sizeof(co2),
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};
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#endif
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#if QSV_HAVE_CO3
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mfxExtCodingOption3 co3 = {
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.Header.BufferId = MFX_EXTBUFF_CODING_OPTION3,
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.Header.BufferSz = sizeof(co3),
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};
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#endif
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mfxExtBuffer *ext_buffers[] = {
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(mfxExtBuffer*)&extradata,
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(mfxExtBuffer*)&co,
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#if QSV_HAVE_CO2
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(mfxExtBuffer*)&co2,
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#endif
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#if QSV_HAVE_CO3
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(mfxExtBuffer*)&co3,
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#endif
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};
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