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truehd: add hand-scheduled ARM asm version of ff_mlp_rematrix_channel.
Profiling results for overall audio decode and the rematrix_channels function
in particular are as follows:
Before After
Mean StdDev Mean StdDev Confidence Change
6:2 total 370.8 17.0 348.8 20.1 99.9% +6.3%
6:2 function 46.4 8.4 45.8 6.6 18.0% +1.2% (insignificant)
8:2 total 343.2 19.0 339.1 15.4 54.7% +1.2% (insignificant)
8:2 function 38.9 3.9 40.2 6.9 52.4% -3.2% (insignificant)
6:6 total 658.4 15.7 604.6 20.8 100.0% +8.9%
6:6 function 109.0 8.7 59.5 5.4 100.0% +83.3%
8:8 total 896.2 24.5 766.4 17.6 100.0% +16.9%
8:8 function 223.4 12.8 93.8 5.0 100.0% +138.3%
The assembly version has also been tested with a fuzz tester to ensure that
any combinations of inputs not exercised by my available test streams still
generate mathematically identical results to the C version.
Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Ben Avison
Martin Storsjö
parent
4e5aa080bb
commit
483321fe78
@ -431,3 +431,225 @@ endfunc
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.unreq ST3
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.unreq I
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.unreq PSAMP
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/********************************************************************/
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PSA .req a1 // samples
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PCO .req a2 // coeffs
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PBL .req a3 // bypassed_lsbs
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INDEX .req a4
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CO0 .req v1
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CO1 .req v2
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CO2 .req v3
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CO3 .req v4
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SA0 .req v5
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SA1 .req v6
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SA2 .req sl
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SA3 .req fp
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AC0 .req ip
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AC1 .req lr
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NOISE .req SA0
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LSB .req SA1
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DCH .req SA2 // dest_ch
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MASK .req SA3
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// INDEX is used as follows:
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// bits 0..6 index2 (values up to 17, but wider so that we can
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// add to index field without needing to mask)
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// bits 7..14 i (values up to 160)
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// bit 15 underflow detect for i
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// bits 25..31 (if access_unit_size_pow2 == 128) \ index
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// bits 26..31 (if access_unit_size_pow2 == 64) /
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.macro implement_rematrix shift, index_mask, mask_minus1, maxchan
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.if \maxchan == 1
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// We can just leave the coefficients in registers in this case
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ldrd CO0, CO1, [PCO]
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.endif
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1:
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.if \maxchan == 1
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ldrd SA0, SA1, [PSA]
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smull AC0, AC1, CO0, SA0
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.elseif \maxchan == 5
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ldr CO0, [PCO, #0]
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ldr SA0, [PSA, #0]
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ldr CO1, [PCO, #4]
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ldr SA1, [PSA, #4]
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ldrd CO2, CO3, [PCO, #8]
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smull AC0, AC1, CO0, SA0
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ldrd SA2, SA3, [PSA, #8]
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smlal AC0, AC1, CO1, SA1
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ldrd CO0, CO1, [PCO, #16]
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smlal AC0, AC1, CO2, SA2
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ldrd SA0, SA1, [PSA, #16]
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smlal AC0, AC1, CO3, SA3
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smlal AC0, AC1, CO0, SA0
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.else // \maxchan == 7
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ldr CO2, [PCO, #0]
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ldr SA2, [PSA, #0]
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ldr CO3, [PCO, #4]
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ldr SA3, [PSA, #4]
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ldrd CO0, CO1, [PCO, #8]
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smull AC0, AC1, CO2, SA2
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ldrd SA0, SA1, [PSA, #8]
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smlal AC0, AC1, CO3, SA3
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ldrd CO2, CO3, [PCO, #16]
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smlal AC0, AC1, CO0, SA0
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ldrd SA2, SA3, [PSA, #16]
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smlal AC0, AC1, CO1, SA1
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ldrd CO0, CO1, [PCO, #24]
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smlal AC0, AC1, CO2, SA2
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ldrd SA0, SA1, [PSA, #24]
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smlal AC0, AC1, CO3, SA3
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smlal AC0, AC1, CO0, SA0
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.endif
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ldm sp, {NOISE, DCH, MASK}
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smlal AC0, AC1, CO1, SA1
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.if \shift != 0
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.if \index_mask == 63
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add NOISE, NOISE, INDEX, lsr #32-6
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ldrb LSB, [PBL], #MAX_CHANNELS
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ldrsb NOISE, [NOISE]
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add INDEX, INDEX, INDEX, lsl #32-6
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.else // \index_mask == 127
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add NOISE, NOISE, INDEX, lsr #32-7
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ldrb LSB, [PBL], #MAX_CHANNELS
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ldrsb NOISE, [NOISE]
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add INDEX, INDEX, INDEX, lsl #32-7
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.endif
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sub INDEX, INDEX, #1<<7
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adds AC0, AC0, NOISE, lsl #\shift + 7
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adc AC1, AC1, NOISE, asr #31
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.else
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ldrb LSB, [PBL], #MAX_CHANNELS
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sub INDEX, INDEX, #1<<7
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.endif
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add PSA, PSA, #MAX_CHANNELS*4
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mov AC0, AC0, lsr #14
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orr AC0, AC0, AC1, lsl #18
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.if !\mask_minus1
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and AC0, AC0, MASK
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.endif
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add AC0, AC0, LSB
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tst INDEX, #1<<15
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str AC0, [PSA, DCH, lsl #2] // DCH is precompensated for the early increment of PSA
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beq 1b
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b 98f
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.endm
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.macro switch_on_maxchan shift, index_mask, mask_minus1
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cmp v4, #5
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blo 51f
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beq 50f
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implement_rematrix \shift, \index_mask, \mask_minus1, 7
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50: implement_rematrix \shift, \index_mask, \mask_minus1, 5
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51: implement_rematrix \shift, \index_mask, \mask_minus1, 1
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.endm
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.macro switch_on_mask shift, index_mask
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cmp sl, #-1
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bne 40f
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switch_on_maxchan \shift, \index_mask, 1
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40: switch_on_maxchan \shift, \index_mask, 0
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.endm
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.macro switch_on_au_size shift
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.if \shift == 0
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switch_on_mask \shift, undefined
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.else
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teq v6, #64
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bne 30f
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orr INDEX, INDEX, v1, lsl #32-6
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switch_on_mask \shift, 63
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30: orr INDEX, INDEX, v1, lsl #32-7
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switch_on_mask \shift, 127
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.endif
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.endm
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/* void ff_mlp_rematrix_channel_arm(int32_t *samples,
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* const int32_t *coeffs,
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* const uint8_t *bypassed_lsbs,
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* const int8_t *noise_buffer,
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* int index,
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* unsigned int dest_ch,
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* uint16_t blockpos,
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* unsigned int maxchan,
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* int matrix_noise_shift,
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* int access_unit_size_pow2,
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* int32_t mask);
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*/
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function ff_mlp_rematrix_channel_arm, export=1
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push {v1-fp,lr}
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add v1, sp, #9*4 // point at arguments on stack
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ldm v1, {v1-sl}
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teq v4, #1
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itt ne
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teqne v4, #5
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teqne v4, #7
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bne 99f
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teq v6, #64
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it ne
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teqne v6, #128
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bne 99f
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sub v2, v2, #MAX_CHANNELS
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push {a4,v2,sl} // initialise NOISE,DCH,MASK; make sp dword-aligned
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movs INDEX, v3, lsl #7
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beq 98f // just in case, do nothing if blockpos = 0
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subs INDEX, INDEX, #1<<7 // offset by 1 so we borrow at the right time
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adc lr, v1, v1 // calculate index2 (C was set by preceding subs)
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orr INDEX, INDEX, lr
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// Switch on matrix_noise_shift: values 0 and 1 are
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// disproportionately common so do those in a form the branch
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// predictor can accelerate. Values can only go up to 15.
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cmp v5, #1
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beq 11f
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blo 10f
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A ldr pc, [pc, v5, lsl #2]
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T tbh [pc, v5, lsl #1]
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0:
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A .word 0, 0, 0, 12f, 13f, 14f, 15f, 16f, 17f, 18f, 19f, 20f, 21f, 22f, 23f, 24f, 25f
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T .hword 0, 0, (12f - 0b) / 2, (13f - 0b) / 2, (14f - 0b) / 2, (15f - 0b) / 2
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T .hword (16f - 0b) / 2, (17f - 0b) / 2, (18f - 0b) / 2, (19f - 0b) / 2
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T .hword (20f - 0b) / 2, (21f - 0b) / 2, (22f - 0b) / 2, (23f - 0b) / 2, (24f - 0b) / 2, (25f - 0b) / 2
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10: switch_on_au_size 0
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11: switch_on_au_size 1
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12: switch_on_au_size 2
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13: switch_on_au_size 3
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14: switch_on_au_size 4
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15: switch_on_au_size 5
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16: switch_on_au_size 6
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17: switch_on_au_size 7
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18: switch_on_au_size 8
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19: switch_on_au_size 9
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20: switch_on_au_size 10
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21: switch_on_au_size 11
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22: switch_on_au_size 12
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23: switch_on_au_size 13
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24: switch_on_au_size 14
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25: switch_on_au_size 15
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98: add sp, sp, #3*4
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pop {v1-fp,pc}
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99: // Can't handle these parameters, drop back to C
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pop {v1-fp,lr}
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b X(ff_mlp_rematrix_channel)
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endfunc
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.unreq PSA
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.unreq PCO
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.unreq PBL
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.unreq INDEX
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.unreq CO0
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.unreq CO1
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.unreq CO2
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.unreq CO3
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.unreq SA0
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.unreq SA1
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.unreq SA2
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.unreq SA3
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.unreq AC0
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.unreq AC1
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.unreq NOISE
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.unreq LSB
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.unreq DCH
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.unreq MASK
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@ -29,6 +29,17 @@ void ff_mlp_filter_channel_arm(int32_t *state, const int32_t *coeff,
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int firorder, int iirorder,
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unsigned int filter_shift, int32_t mask,
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int blocksize, int32_t *sample_buffer);
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void ff_mlp_rematrix_channel_arm(int32_t *samples,
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const int32_t *coeffs,
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const uint8_t *bypassed_lsbs,
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const int8_t *noise_buffer,
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int index,
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unsigned int dest_ch,
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uint16_t blockpos,
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unsigned int maxchan,
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int matrix_noise_shift,
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int access_unit_size_pow2,
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int32_t mask);
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av_cold void ff_mlpdsp_init_arm(MLPDSPContext *c)
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{
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@ -36,5 +47,6 @@ av_cold void ff_mlpdsp_init_arm(MLPDSPContext *c)
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if (have_armv5te(cpu_flags)) {
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c->mlp_filter_channel = ff_mlp_filter_channel_arm;
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c->mlp_rematrix_channel = ff_mlp_rematrix_channel_arm;
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}
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}
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