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x86: simple_idct(_put): 10bits versions
Modeled from the prores version. Clips to [0;1023] and is bitexact. Bitexactness requires to add offsets in different places compared to prores or C, and makes the function approximately 2% slower. For 16 frames of a DNxHD 4:2:2 10bits test sequence: C: 60861 decicycles in idct, 1048205 runs, 371 skips sse2: 27567 decicycles in idct, 1048216 runs, 360 skips avx: 26272 decicycles in idct, 1048171 runs, 405 skips The add version is not implemented, so the corresponding dsp function is set to NULL to make it clear in a code executing it. Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
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@ -126,6 +126,7 @@ YASM-OBJS-$(CONFIG_QPELDSP) += x86/qpeldsp.o \
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x86/fpel.o \
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x86/fpel.o \
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x86/qpel.o
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x86/qpel.o
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YASM-OBJS-$(CONFIG_RV34DSP) += x86/rv34dsp.o
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YASM-OBJS-$(CONFIG_RV34DSP) += x86/rv34dsp.o
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YASM-OBJS-$(CONFIG_IDCTDSP) += x86/simple_idct10.o
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YASM-OBJS-$(CONFIG_VIDEODSP) += x86/videodsp.o
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YASM-OBJS-$(CONFIG_VIDEODSP) += x86/videodsp.o
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YASM-OBJS-$(CONFIG_VP3DSP) += x86/vp3dsp.o
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YASM-OBJS-$(CONFIG_VP3DSP) += x86/vp3dsp.o
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YASM-OBJS-$(CONFIG_VP8DSP) += x86/vp8dsp.o \
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YASM-OBJS-$(CONFIG_VP8DSP) += x86/vp8dsp.o \
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@ -85,4 +85,24 @@ av_cold void ff_idctdsp_init_x86(IDCTDSPContext *c, AVCodecContext *avctx,
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c->put_pixels_clamped = ff_put_pixels_clamped_sse2;
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c->put_pixels_clamped = ff_put_pixels_clamped_sse2;
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c->add_pixels_clamped = ff_add_pixels_clamped_sse2;
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c->add_pixels_clamped = ff_add_pixels_clamped_sse2;
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}
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}
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if (ARCH_X86_64 &&
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avctx->bits_per_raw_sample == 10 && avctx->lowres == 0 &&
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(avctx->idct_algo == FF_IDCT_AUTO ||
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avctx->idct_algo == FF_IDCT_SIMPLEAUTO ||
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avctx->idct_algo == FF_IDCT_SIMPLE)) {
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if (EXTERNAL_SSE2(cpu_flags)) {
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c->idct_put = ff_simple_idct10_put_sse2;
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c->idct_add = NULL;
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c->idct = ff_simple_idct10_sse2;
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c->perm_type = FF_IDCT_PERM_TRANSPOSE;
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}
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if (EXTERNAL_AVX(cpu_flags)) {
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c->idct_put = ff_simple_idct10_put_avx;
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c->idct_add = NULL;
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c->idct = ff_simple_idct10_avx;
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c->perm_type = FF_IDCT_PERM_TRANSPOSE;
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}
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}
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}
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}
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@ -37,17 +37,17 @@ cextern pw_1019
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section .text align=16
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section .text align=16
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%macro idct_put_fn 0
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%macro idct_fn 0
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cglobal prores_idct_put_10, 4, 4, 15
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cglobal prores_idct_put_10, 4, 4, 15
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IDCT_PUT_FN pw_1, 15, pw_88, 18, pw_4, pw_1019, r3
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IDCT_FN pw_1, 15, pw_88, 18, pw_4, pw_1019, r3
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RET
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RET
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%endmacro
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%endmacro
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INIT_XMM sse2
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INIT_XMM sse2
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idct_put_fn
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idct_fn
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%if HAVE_AVX_EXTERNAL
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%if HAVE_AVX_EXTERNAL
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INIT_XMM avx
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INIT_XMM avx
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idct_put_fn
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idct_fn
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%endif
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%endif
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%endif
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%endif
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@ -25,4 +25,10 @@ void ff_simple_idct_mmx(int16_t *block);
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void ff_simple_idct_add_mmx(uint8_t *dest, int line_size, int16_t *block);
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void ff_simple_idct_add_mmx(uint8_t *dest, int line_size, int16_t *block);
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void ff_simple_idct_put_mmx(uint8_t *dest, int line_size, int16_t *block);
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void ff_simple_idct_put_mmx(uint8_t *dest, int line_size, int16_t *block);
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void ff_simple_idct10_sse2(int16_t *block);
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void ff_simple_idct10_avx(int16_t *block);
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void ff_simple_idct10_put_sse2(uint8_t *dest, int line_size, int16_t *block);
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void ff_simple_idct10_put_avx(uint8_t *dest, int line_size, int16_t *block);
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#endif /* AVCODEC_X86_SIMPLE_IDCT_H */
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#endif /* AVCODEC_X86_SIMPLE_IDCT_H */
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58
libavcodec/x86/simple_idct10.asm
Normal file
58
libavcodec/x86/simple_idct10.asm
Normal file
@ -0,0 +1,58 @@
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;******************************************************************************
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;* x86-SIMD-optimized IDCT for prores
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;* this is identical to "simple" IDCT written by Michael Niedermayer
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;* except for the clip range
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;*
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;* Copyright (c) 2011 Ronald S. Bultje <rsbultje@gmail.com>
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;* Copyright (c) 2015 Christophe Gisquet
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* 51, Inc., Foundation Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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%if ARCH_X86_64
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SECTION_RODATA
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cextern pw_16
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cextern pw_1023
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pd_round_12: times 4 dd 1<<(12-1)
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pd_round_19: times 4 dd 1<<(19-1)
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%include "libavcodec/x86/simple_idct10_template.asm"
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section .text align=16
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%macro idct_fn 0
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cglobal simple_idct10, 1, 1, 16
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IDCT_FN "", 12, "", 19
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RET
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cglobal simple_idct10_put, 3, 3, 16
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IDCT_FN "", 12, "", 19, 0, pw_1023
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RET
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%endmacro
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INIT_XMM sse2
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idct_fn
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%if HAVE_AVX_EXTERNAL
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INIT_XMM avx
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idct_fn
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%endif
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%endif
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@ -128,18 +128,18 @@ cextern w7_min_w5
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psubd m3, m9 ; a1[4-7] intermediate
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psubd m3, m9 ; a1[4-7] intermediate
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; load/store
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; load/store
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mova [r2+ 0], m0
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mova [COEFFS+ 0], m0
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mova [r2+ 32], m2
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mova [COEFFS+ 32], m2
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mova [r2+ 64], m4
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mova [COEFFS+ 64], m4
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mova [r2+ 96], m6
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mova [COEFFS+ 96], m6
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mova m10,[r2+ 16] ; { row[1] }[0-7]
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mova m10,[COEFFS+ 16] ; { row[1] }[0-7]
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mova m8, [r2+ 48] ; { row[3] }[0-7]
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mova m8, [COEFFS+ 48] ; { row[3] }[0-7]
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mova m13,[r2+ 80] ; { row[5] }[0-7]
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mova m13,[COEFFS+ 80] ; { row[5] }[0-7]
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mova m14,[r2+112] ; { row[7] }[0-7]
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mova m14,[COEFFS+112] ; { row[7] }[0-7]
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mova [r2+ 16], m1
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mova [COEFFS+ 16], m1
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mova [r2+ 48], m3
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mova [COEFFS+ 48], m3
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mova [r2+ 80], m5
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mova [COEFFS+ 80], m5
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mova [r2+112], m7
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mova [COEFFS+112], m7
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%if %0 == 3
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%if %0 == 3
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pmullw m10,[%3+ 16]
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pmullw m10,[%3+ 16]
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pmullw m8, [%3+ 48]
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pmullw m8, [%3+ 48]
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@ -210,17 +210,17 @@ cextern w7_min_w5
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; row[5] = (a2 - b2) >> 15;
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; row[5] = (a2 - b2) >> 15;
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; row[3] = (a3 + b3) >> 15;
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; row[3] = (a3 + b3) >> 15;
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; row[4] = (a3 - b3) >> 15;
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; row[4] = (a3 - b3) >> 15;
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mova m8, [r2+ 0] ; a0[0-3]
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mova m8, [COEFFS+ 0] ; a0[0-3]
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mova m9, [r2+16] ; a0[4-7]
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mova m9, [COEFFS+16] ; a0[4-7]
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SUMSUB_SHPK m8, m9, m10, m11, m0, m1, %2
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SUMSUB_SHPK m8, m9, m10, m11, m0, m1, %2
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mova m0, [r2+32] ; a1[0-3]
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mova m0, [COEFFS+32] ; a1[0-3]
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mova m1, [r2+48] ; a1[4-7]
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mova m1, [COEFFS+48] ; a1[4-7]
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SUMSUB_SHPK m0, m1, m9, m11, m2, m3, %2
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SUMSUB_SHPK m0, m1, m9, m11, m2, m3, %2
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mova m1, [r2+64] ; a2[0-3]
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mova m1, [COEFFS+64] ; a2[0-3]
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mova m2, [r2+80] ; a2[4-7]
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mova m2, [COEFFS+80] ; a2[4-7]
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SUMSUB_SHPK m1, m2, m11, m3, m4, m5, %2
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SUMSUB_SHPK m1, m2, m11, m3, m4, m5, %2
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mova m2, [r2+96] ; a3[0-3]
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mova m2, [COEFFS+96] ; a3[0-3]
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mova m3, [r2+112] ; a3[4-7]
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mova m3, [COEFFS+112] ; a3[4-7]
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SUMSUB_SHPK m2, m3, m4, m5, m6, m7, %2
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SUMSUB_SHPK m2, m3, m4, m5, m6, m7, %2
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%endmacro
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%endmacro
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@ -235,15 +235,21 @@ cextern w7_min_w5
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; %6 = max pixel value
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; %6 = max pixel value
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; %7 = qmat (for prores)
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; %7 = qmat (for prores)
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%macro IDCT_PUT_FN 6-7
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%macro IDCT_FN 4-7
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%if %0 == 4
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; No clamping, means pure idct
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%xdefine COEFFS r0
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%else
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movsxd r1, r1d
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movsxd r1, r1d
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%xdefine COEFFS r2
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%endif
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; for (i = 0; i < 8; i++)
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; for (i = 0; i < 8; i++)
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; idctRowCondDC(block + i*8);
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; idctRowCondDC(block + i*8);
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mova m10,[r2+ 0] ; { row[0] }[0-7]
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mova m10,[COEFFS+ 0] ; { row[0] }[0-7]
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mova m8, [r2+32] ; { row[2] }[0-7]
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mova m8, [COEFFS+32] ; { row[2] }[0-7]
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mova m13,[r2+64] ; { row[4] }[0-7]
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mova m13,[COEFFS+64] ; { row[4] }[0-7]
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mova m12,[r2+96] ; { row[6] }[0-7]
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mova m12,[COEFFS+96] ; { row[6] }[0-7]
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%if %0 == 7
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%if %0 == 7
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pmullw m10,[%7+ 0]
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pmullw m10,[%7+ 0]
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@ -258,10 +264,10 @@ cextern w7_min_w5
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; transpose for second part of IDCT
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; transpose for second part of IDCT
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TRANSPOSE8x8W 8, 0, 1, 2, 4, 11, 9, 10, 3
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TRANSPOSE8x8W 8, 0, 1, 2, 4, 11, 9, 10, 3
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mova [r2+ 16], m0
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mova [COEFFS+ 16], m0
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mova [r2+ 48], m2
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mova [COEFFS+ 48], m2
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mova [r2+ 80], m11
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mova [COEFFS+ 80], m11
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mova [r2+112], m10
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mova [COEFFS+112], m10
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SWAP 8, 10
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SWAP 8, 10
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SWAP 1, 8
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SWAP 1, 8
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SWAP 4, 13
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SWAP 4, 13
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@ -272,6 +278,17 @@ cextern w7_min_w5
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IDCT_1D %3, %4
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IDCT_1D %3, %4
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; clip/store
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; clip/store
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%if %0 == 4
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; No clamping, means pure idct
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mova [r0+ 0], m8
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mova [r0+ 16], m0
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mova [r0+ 32], m1
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mova [r0+ 48], m2
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mova [r0+ 64], m4
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mova [r0+ 80], m11
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mova [r0+ 96], m9
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mova [r0+112], m10
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%else
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%ifidn %5, 0
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%ifidn %5, 0
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pxor m3, m3
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pxor m3, m3
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%else
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%else
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mova [r0+r1 ], m11
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mova [r0+r1 ], m11
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mova [r0+r1*2], m9
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mova [r0+r1*2], m9
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mova [r0+r2 ], m10
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mova [r0+r2 ], m10
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%endif
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%endmacro
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%endmacro
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%endif
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%endif
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