mirror of https://git.ffmpeg.org/ffmpeg.git
aarch64/vvc: Add avg
avg_8_2x2_c: 0.2 ( 1.00x) avg_8_2x2_neon: 0.2 ( 1.00x) avg_8_4x4_c: 0.2 ( 1.00x) avg_8_4x4_neon: 0.2 ( 1.00x) avg_8_8x8_c: 0.9 ( 1.00x) avg_8_8x8_neon: 0.2 ( 5.29x) avg_8_16x16_c: 3.7 ( 1.00x) avg_8_16x16_neon: 0.7 ( 5.44x) avg_8_32x32_c: 14.9 ( 1.00x) avg_8_32x32_neon: 1.7 ( 8.91x) avg_8_64x64_c: 59.7 ( 1.00x) avg_8_64x64_neon: 6.9 ( 8.62x) avg_8_128x128_c: 254.7 ( 1.00x) avg_8_128x128_neon: 26.9 ( 9.46x) avg_10_2x2_c: 0.2 ( 1.00x) avg_10_2x2_neon: 0.2 ( 1.00x) avg_10_4x4_c: 0.2 ( 1.00x) avg_10_4x4_neon: 0.2 ( 1.00x) avg_10_8x8_c: 0.9 ( 1.00x) avg_10_8x8_neon: 0.2 ( 5.29x) avg_10_16x16_c: 3.4 ( 1.00x) avg_10_16x16_neon: 0.4 ( 8.06x) avg_10_32x32_c: 13.9 ( 1.00x) avg_10_32x32_neon: 1.9 ( 7.23x) avg_10_64x64_c: 54.2 ( 1.00x) avg_10_64x64_neon: 8.4 ( 6.43x) avg_10_128x128_c: 232.4 ( 1.00x) avg_10_128x128_neon: 30.9 ( 7.52x) avg_12_2x2_c: 0.0 ( 0.00x) avg_12_2x2_neon: 0.2 ( 0.00x) avg_12_4x4_c: 0.4 ( 1.00x) avg_12_4x4_neon: 0.2 ( 2.43x) avg_12_8x8_c: 0.7 ( 1.00x) avg_12_8x8_neon: 0.2 ( 3.86x) avg_12_16x16_c: 3.7 ( 1.00x) avg_12_16x16_neon: 0.4 ( 8.65x) avg_12_32x32_c: 13.7 ( 1.00x) avg_12_32x32_neon: 2.2 ( 6.29x) avg_12_64x64_c: 53.9 ( 1.00x) avg_12_64x64_neon: 7.7 ( 7.03x) avg_12_128x128_c: 270.9 ( 1.00x) avg_12_128x128_neon: 30.4 ( 8.90x)
This commit is contained in:
Zhao Zhili
Nuo Mi
parent
1be5a2374f
commit
3f84d1d1fb
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@ -3,6 +3,7 @@ clean::
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OBJS-$(CONFIG_VVC_DECODER) += aarch64/vvc/dsp_init.o
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NEON-OBJS-$(CONFIG_VVC_DECODER) += aarch64/vvc/alf.o \
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aarch64/vvc/inter.o \
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aarch64/vvc/sad.o \
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aarch64/h26x/epel_neon.o \
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aarch64/h26x/qpel_neon.o \
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@ -42,6 +42,16 @@
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int ff_vvc_sad_neon(const int16_t *src0, const int16_t *src1, int dx, int dy,
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const int block_w, const int block_h);
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void ff_vvc_avg_8_neon(uint8_t *dst, ptrdiff_t dst_stride,
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const int16_t *src0, const int16_t *src1, int width,
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int height);
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void ff_vvc_avg_10_neon(uint8_t *dst, ptrdiff_t dst_stride,
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const int16_t *src0, const int16_t *src1, int width,
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int height);
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void ff_vvc_avg_12_neon(uint8_t *dst, ptrdiff_t dst_stride,
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const int16_t *src0, const int16_t *src1, int width,
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int height);
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void ff_vvc_dsp_init_aarch64(VVCDSPContext *const c, const int bd)
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{
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int cpu_flags = av_get_cpu_flags();
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@ -112,6 +122,8 @@ void ff_vvc_dsp_init_aarch64(VVCDSPContext *const c, const int bd)
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c->inter.put_uni_w[0][5][0][0] = ff_vvc_put_pel_uni_w_pixels64_8_neon;
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c->inter.put_uni_w[0][6][0][0] = ff_vvc_put_pel_uni_w_pixels128_8_neon;
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c->inter.avg = ff_vvc_avg_8_neon;
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for (int i = 0; i < FF_ARRAY_ELEMS(c->sao.band_filter); i++)
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c->sao.band_filter[i] = ff_h26x_sao_band_filter_8x8_8_neon;
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c->sao.edge_filter[0] = ff_vvc_sao_edge_filter_8x8_8_neon;
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@ -150,9 +162,13 @@ void ff_vvc_dsp_init_aarch64(VVCDSPContext *const c, const int bd)
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c->inter.put[1][6][1][1] = ff_vvc_put_epel_hv128_8_neon_i8mm;
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}
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} else if (bd == 10) {
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c->inter.avg = ff_vvc_avg_10_neon;
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c->alf.filter[LUMA] = alf_filter_luma_10_neon;
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c->alf.filter[CHROMA] = alf_filter_chroma_10_neon;
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} else if (bd == 12) {
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c->inter.avg = ff_vvc_avg_12_neon;
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c->alf.filter[LUMA] = alf_filter_luma_12_neon;
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c->alf.filter[CHROMA] = alf_filter_chroma_12_neon;
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}
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@ -0,0 +1,163 @@
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/*
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* Copyright (c) 2024 Zhao Zhili <quinkblack@foxmail.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/aarch64/asm.S"
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#define VVC_MAX_PB_SIZE 128
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.macro vvc_avg, bit_depth
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.macro vvc_avg_\bit_depth\()_2_4, tap
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.if \tap == 2
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ldr s0, [src0]
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ldr s2, [src1]
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.else
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ldr d0, [src0]
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ldr d2, [src1]
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.endif
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saddl v4.4s, v0.4h, v2.4h
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add v4.4s, v4.4s, v16.4s
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sqshrn v4.4h, v4.4s, #(15 - \bit_depth)
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.if \bit_depth == 8
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sqxtun v4.8b, v4.8h
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.if \tap == 2
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str h4, [dst]
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.else // tap == 4
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str s4, [dst]
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.endif
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.else // bit_depth > 8
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smin v4.4h, v4.4h, v17.4h
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smax v4.4h, v4.4h, v18.4h
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.if \tap == 2
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str s4, [dst]
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.else
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str d4, [dst]
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.endif
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.endif
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add src0, src0, x10
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add src1, src1, x10
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add dst, dst, dst_stride
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.endm
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function ff_vvc_avg_\bit_depth\()_neon, export=1
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dst .req x0
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dst_stride .req x1
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src0 .req x2
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src1 .req x3
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width .req w4
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height .req w5
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mov x10, #(VVC_MAX_PB_SIZE * 2)
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cmp width, #8
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.if \bit_depth == 8
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movi v16.4s, #64
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.else
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.if \bit_depth == 10
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mov w6, #1023
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movi v16.4s, #16
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.else
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mov w6, #4095
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movi v16.4s, #4
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.endif
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movi v18.8h, #0
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dup v17.8h, w6
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.endif
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b.eq 8f
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b.hi 16f
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cmp width, #4
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b.eq 4f
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2: // width == 2
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subs height, height, #1
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vvc_avg_\bit_depth\()_2_4 2
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b.ne 2b
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b 32f
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4: // width == 4
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subs height, height, #1
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vvc_avg_\bit_depth\()_2_4 4
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b.ne 4b
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b 32f
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8: // width == 8
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ld1 {v0.8h}, [src0], x10
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ld1 {v2.8h}, [src1], x10
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saddl v4.4s, v0.4h, v2.4h
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saddl2 v5.4s, v0.8h, v2.8h
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add v4.4s, v4.4s, v16.4s
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add v5.4s, v5.4s, v16.4s
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sqshrn v4.4h, v4.4s, #(15 - \bit_depth)
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sqshrn2 v4.8h, v5.4s, #(15 - \bit_depth)
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subs height, height, #1
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.if \bit_depth == 8
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sqxtun v4.8b, v4.8h
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st1 {v4.8b}, [dst], dst_stride
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.else
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smin v4.8h, v4.8h, v17.8h
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smax v4.8h, v4.8h, v18.8h
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st1 {v4.8h}, [dst], dst_stride
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.endif
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b.ne 8b
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b 32f
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16: // width >= 16
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mov w6, width
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mov x7, src0
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mov x8, src1
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mov x9, dst
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17:
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ldp q0, q1, [x7], #32
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ldp q2, q3, [x8], #32
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saddl v4.4s, v0.4h, v2.4h
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saddl2 v5.4s, v0.8h, v2.8h
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saddl v6.4s, v1.4h, v3.4h
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saddl2 v7.4s, v1.8h, v3.8h
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add v4.4s, v4.4s, v16.4s
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add v5.4s, v5.4s, v16.4s
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add v6.4s, v6.4s, v16.4s
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add v7.4s, v7.4s, v16.4s
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sqshrn v4.4h, v4.4s, #(15 - \bit_depth)
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sqshrn2 v4.8h, v5.4s, #(15 - \bit_depth)
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sqshrn v6.4h, v6.4s, #(15 - \bit_depth)
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sqshrn2 v6.8h, v7.4s, #(15 - \bit_depth)
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subs w6, w6, #16
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.if \bit_depth == 8
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sqxtun v4.8b, v4.8h
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sqxtun2 v4.16b, v6.8h
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str q4, [x9], #16
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.else
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smin v4.8h, v4.8h, v17.8h
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smin v6.8h, v6.8h, v17.8h
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smax v4.8h, v4.8h, v18.8h
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smax v6.8h, v6.8h, v18.8h
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stp q4, q6, [x9], #32
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.endif
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b.ne 17b
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subs height, height, #1
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add src0, src0, x10
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add src1, src1, x10
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add dst, dst, dst_stride
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b.ne 16b
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32:
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ret
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endfunc
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.endm
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vvc_avg 8
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vvc_avg 10
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vvc_avg 12
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