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ARMv6 optimised pix_abs16_x2
Originally committed as revision 21698 to svn://svn.ffmpeg.org/ffmpeg/trunk
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e6056a9008
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@ -315,3 +315,58 @@ function ff_pix_abs16_armv6, export=1
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add r0, r12, lr
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pop {r4-r9, pc}
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.endfunc
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function ff_pix_abs16_x2_armv6, export=1
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ldr r12, [sp]
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push {r4-r11, lr}
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mov r0, #0
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mov lr, #1
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orr lr, lr, lr, lsl #8
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orr lr, lr, lr, lsl #16
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1:
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ldr r8, [r2]
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ldr r9, [r2, #4]
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lsr r10, r8, #8
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ldr r4, [r1]
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lsr r6, r9, #8
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orr r10, r10, r9, lsl #24
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ldr r5, [r2, #8]
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eor r11, r8, r10
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uhadd8 r7, r8, r10
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orr r6, r6, r5, lsl #24
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and r11, r11, lr
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uadd8 r7, r7, r11
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ldr r8, [r1, #4]
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usada8 r0, r4, r7, r0
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eor r7, r9, r6
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lsr r10, r5, #8
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and r7, r7, lr
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uhadd8 r4, r9, r6
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ldr r6, [r2, #12]
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uadd8 r4, r4, r7
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pld [r1, r3]
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orr r10, r10, r6, lsl #24
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usada8 r0, r8, r4, r0
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ldr r4, [r1, #8]
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eor r11, r5, r10
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ldrb r7, [r2, #16]
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and r11, r11, lr
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uhadd8 r8, r5, r10
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ldr r5, [r1, #12]
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uadd8 r8, r8, r11
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pld [r2, r3]
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lsr r10, r6, #8
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usada8 r0, r4, r8, r0
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orr r10, r10, r7, lsl #24
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subs r12, r12, #1
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eor r11, r6, r10
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add r1, r1, r3
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uhadd8 r9, r6, r10
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and r11, r11, lr
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uadd8 r9, r9, r11
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add r2, r2, r3
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usada8 r0, r5, r9, r0
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bgt 1b
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pop {r4-r11, pc}
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.endfunc
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@ -52,6 +52,8 @@ void ff_add_pixels_clamped_armv6(const DCTELEM *block,
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int ff_pix_abs16_armv6(void *s, uint8_t *blk1, uint8_t *blk2,
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int line_size, int h);
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int ff_pix_abs16_x2_armv6(void *s, uint8_t *blk1, uint8_t *blk2,
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int line_size, int h);
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void av_cold ff_dsputil_init_armv6(DSPContext* c, AVCodecContext *avctx)
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{
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@ -87,6 +89,7 @@ void av_cold ff_dsputil_init_armv6(DSPContext* c, AVCodecContext *avctx)
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c->add_pixels_clamped = ff_add_pixels_clamped_armv6;
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c->pix_abs[0][0] = ff_pix_abs16_armv6;
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c->pix_abs[0][1] = ff_pix_abs16_x2_armv6;
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c->sad[0] = ff_pix_abs16_armv6;
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}
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