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lavc/bswapdsp: RISC-V V bswap16_buf
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d7528af4df
commit
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@ -27,6 +27,7 @@
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void ff_bswap32_buf_rvb(uint32_t *dst, const uint32_t *src, int len);
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void ff_bswap32_buf_rvv(uint32_t *dst, const uint32_t *src, int len);
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void ff_bswap16_buf_rvv(uint16_t *dst, const uint16_t *src, int len);
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av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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{
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@ -37,7 +38,9 @@ av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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c->bswap_buf = ff_bswap32_buf_rvb;
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#endif
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#if HAVE_RVV
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if (cpu_flags & AV_CPU_FLAG_RVV_I32)
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if (cpu_flags & AV_CPU_FLAG_RVV_I32) {
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c->bswap_buf = ff_bswap32_buf_rvv;
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c->bswap16_buf = ff_bswap16_buf_rvv;
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}
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#endif
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}
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@ -43,3 +43,20 @@ func ff_bswap32_buf_rvv, zve32x
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ret
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endfunc
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func ff_bswap16_buf_rvv, zve32x
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li t2, 2
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addi t1, a0, 1
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1:
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vsetvli t0, a2, e8, m1, ta, ma
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vlseg2e8.v v8, (a1)
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sub a2, a2, t0
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sh1add a1, t0, a1
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vsse8.v v8, (t1), t2
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sh1add t1, t0, t1
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vsse8.v v9, (a0), t2
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sh1add a0, t0, a0
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bnez a2, 1b
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ret
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endfunc
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