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lavc/aarch64: new optimization for 8-bit hevc_epel_v
checkasm bench: put_hevc_epel_v4_8_c: 79.9 put_hevc_epel_v4_8_neon: 25.7 put_hevc_epel_v6_8_c: 151.4 put_hevc_epel_v6_8_neon: 46.4 put_hevc_epel_v8_8_c: 250.9 put_hevc_epel_v8_8_neon: 41.7 put_hevc_epel_v12_8_c: 542.7 put_hevc_epel_v12_8_neon: 108.7 put_hevc_epel_v16_8_c: 939.4 put_hevc_epel_v16_8_neon: 169.2 put_hevc_epel_v24_8_c: 2104.9 put_hevc_epel_v24_8_neon: 307.9 put_hevc_epel_v32_8_c: 3713.9 put_hevc_epel_v32_8_neon: 524.2 put_hevc_epel_v48_8_c: 8175.2 put_hevc_epel_v48_8_neon: 1197.2 put_hevc_epel_v64_8_c: 16049.4 put_hevc_epel_v64_8_neon: 2094.9 Co-Authored-By: J. Dekker <jdek@itanimul.li> Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Logan Lyu
Martin Storsjö
parent
772865717b
commit
22c7291506
@ -243,6 +243,229 @@ function ff_hevc_put_hevc_pel_pixels64_8_neon, export=1
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ret
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endfunc
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function ff_hevc_put_hevc_epel_v4_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2)
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ldr s16, [x1]
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ldr s17, [x1, x2]
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add x1, x1, x2, lsl #1
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ld1 {v18.s}[0], [x1], x2
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().s}[0], [x1], x2
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movi v4.8h, #0
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calc_epelb v4, \src0, \src1, \src2, \src3
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subs w3, w3, #1
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st1 {v4.4h}, [x0], x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v6_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2 - 8)
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ldr d16, [x1]
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ldr d17, [x1, x2]
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add x1, x1, x2, lsl #1
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ld1 {v18.8b}, [x1], x2
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().8b}, [x1], x2
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movi v4.8h, #0
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calc_epelb v4, \src0, \src1, \src2, \src3
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st1 {v4.d}[0], [x0], #8
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subs w3, w3, #1
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st1 {v4.s}[2], [x0], x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v8_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2)
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ldr d16, [x1]
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ldr d17, [x1, x2]
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add x1, x1, x2, lsl #1
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ld1 {v18.8b}, [x1], x2
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().8b}, [x1], x2
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movi v4.8h, #0
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calc_epelb v4, \src0, \src1, \src2, \src3
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subs w3, w3, #1
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st1 {v4.8h}, [x0], x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v12_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2)
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ldr q16, [x1]
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ldr q17, [x1, x2]
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add x1, x1, x2, lsl #1
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ld1 {v18.16b}, [x1], x2
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().16b}, [x1], x2
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movi v4.8h, #0
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movi v5.8h, #0
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calc_epelb v4, \src0, \src1, \src2, \src3
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calc_epelb2 v5, \src0, \src1, \src2, \src3
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str q4, [x0]
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subs w3, w3, #1
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str d5, [x0, #16]
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add x0, x0, x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v16_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2)
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ldr q16, [x1]
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ldr q17, [x1, x2]
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add x1, x1, x2, lsl #1
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ld1 {v18.16b}, [x1], x2
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().16b}, [x1], x2
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movi v4.8h, #0
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movi v5.8h, #0
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calc_epelb v4, \src0, \src1, \src2, \src3
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calc_epelb2 v5, \src0, \src1, \src2, \src3
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subs w3, w3, #1
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st1 {v4.8h, v5.8h}, [x0], x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v24_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2)
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ld1 {v16.8b, v17.8b, v18.8b}, [x1], x2
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ld1 {v19.8b, v20.8b, v21.8b}, [x1], x2
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ld1 {v22.8b, v23.8b, v24.8b}, [x1], x2
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10, src11
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ld1 {\src9\().8b, \src10\().8b, \src11\().8b}, [x1], x2
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movi v4.8h, #0
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movi v5.8h, #0
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movi v6.8h, #0
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calc_epelb v4, \src0, \src3, \src6, \src9
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calc_epelb v5, \src1, \src4, \src7, \src10
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calc_epelb v6, \src2, \src5, \src8, \src11
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subs w3, w3, #1
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st1 {v4.8h-v6.8h}, [x0], x10
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.endm
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1: calc_all12
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v32_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #(MAX_PB_SIZE * 2)
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ld1 {v16.16b, v17.16b}, [x1], x2
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ld1 {v18.16b, v19.16b}, [x1], x2
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ld1 {v20.16b, v21.16b}, [x1], x2
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7
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ld1 {\src6\().16b, \src7\().16b}, [x1], x2
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movi v4.8h, #0
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movi v5.8h, #0
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movi v6.8h, #0
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movi v7.8h, #0
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calc_epelb v4, \src0, \src2, \src4, \src6
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calc_epelb2 v5, \src0, \src2, \src4, \src6
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calc_epelb v6, \src1, \src3, \src5, \src7
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calc_epelb2 v7, \src1, \src3, \src5, \src7
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subs w3, w3, #1
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st1 {v4.8h-v7.8h}, [x0], x10
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.endm
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1: calc_all8
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v48_8_neon, export=1
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load_epel_filterb x5, x4
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sub x1, x1, x2
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mov x10, #64
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ld1 {v16.16b, v17.16b, v18.16b}, [x1], x2
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ld1 {v19.16b, v20.16b, v21.16b}, [x1], x2
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ld1 {v22.16b, v23.16b, v24.16b}, [x1], x2
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10, src11
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ld1 {\src9\().16b, \src10\().16b, \src11\().16b}, [x1], x2
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movi v4.8h, #0
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movi v5.8h, #0
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movi v6.8h, #0
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movi v7.8h, #0
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movi v28.8h, #0
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movi v29.8h, #0
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calc_epelb v4, \src0, \src3, \src6, \src9
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calc_epelb2 v5, \src0, \src3, \src6, \src9
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calc_epelb v6, \src1, \src4, \src7, \src10
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calc_epelb2 v7, \src1, \src4, \src7, \src10
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calc_epelb v28, \src2, \src5, \src8, \src11
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calc_epelb2 v29, \src2, \src5, \src8, \src11
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st1 {v4.8h-v7.8h}, [x0], #64
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subs w3, w3, #1
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st1 {v28.8h-v29.8h}, [x0], x10
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.endm
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1: calc_all12
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_v64_8_neon, export=1
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load_epel_filterb x5, x4
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sub sp, sp, #32
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st1 {v8.8b-v11.8b}, [sp]
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sub x1, x1, x2
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ld1 {v16.16b, v17.16b, v18.16b, v19.16b}, [x1], x2
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ld1 {v20.16b, v21.16b, v22.16b, v23.16b}, [x1], x2
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ld1 {v24.16b, v25.16b, v26.16b, v27.16b}, [x1], x2
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10, src11, src12, src13, src14, src15
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ld1 {\src12\().16b-\src15\().16b}, [x1], x2
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movi v4.8h, #0
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movi v5.8h, #0
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movi v6.8h, #0
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movi v7.8h, #0
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movi v8.8h, #0
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movi v9.8h, #0
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movi v10.8h, #0
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movi v11.8h, #0
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calc_epelb v4, \src0, \src4, \src8, \src12
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calc_epelb2 v5, \src0, \src4, \src8, \src12
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calc_epelb v6, \src1, \src5, \src9, \src13
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calc_epelb2 v7, \src1, \src5, \src9, \src13
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calc_epelb v8, \src2, \src6, \src10, \src14
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calc_epelb2 v9, \src2, \src6, \src10, \src14
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calc_epelb v10, \src3, \src7, \src11, \src15
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calc_epelb2 v11, \src3, \src7, \src11, \src15
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st1 {v4.8h-v7.8h}, [x0], #64
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subs w3, w3, #1
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st1 {v8.8h-v11.8h}, [x0], #64
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.endm
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1: calc_all16
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.purgem calc
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2: ld1 {v8.8b-v11.8b}, [sp]
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add sp, sp, #32
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ret
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endfunc
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function ff_hevc_put_hevc_epel_uni_v4_8_neon, export=1
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load_epel_filterb x6, x5
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sub x2, x2, x3
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@ -156,6 +156,10 @@ NEON8_FNPROTO(pel_pixels, (int16_t *dst,
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const uint8_t *src, ptrdiff_t srcstride,
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int height, intptr_t mx, intptr_t my, int width),);
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NEON8_FNPROTO(epel_v, (int16_t *dst,
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const uint8_t *src, ptrdiff_t srcstride,
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int height, intptr_t mx, intptr_t my, int width),);
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NEON8_FNPROTO(pel_uni_pixels, (uint8_t *_dst, ptrdiff_t _dststride,
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const uint8_t *_src, ptrdiff_t _srcstride,
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int height, intptr_t mx, intptr_t my, int width),);
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@ -305,6 +309,7 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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c->put_hevc_qpel_bi[9][0][1] = ff_hevc_put_hevc_qpel_bi_h16_8_neon;
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NEON8_FNASSIGN(c->put_hevc_epel, 0, 0, pel_pixels,);
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NEON8_FNASSIGN(c->put_hevc_epel, 1, 0, epel_v,);
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NEON8_FNASSIGN(c->put_hevc_qpel, 0, 0, pel_pixels,);
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NEON8_FNASSIGN(c->put_hevc_epel_uni, 0, 0, pel_uni_pixels,);
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NEON8_FNASSIGN(c->put_hevc_epel_uni, 1, 0, epel_uni_v,);
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