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lavu: add AESNI CPU flag
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parent
057ce755b9
commit
1e477a970f
4
configure
vendored
4
configure
vendored
@ -368,6 +368,7 @@ Optimization options (experts only):
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--disable-fma3 disable FMA3 optimizations
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--disable-fma4 disable FMA4 optimizations
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--disable-avx2 disable AVX2 optimizations
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--disable-aesni disable AESNI optimizations
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--disable-armv5te disable armv5te optimizations
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--disable-armv6 disable armv6 optimizations
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--disable-armv6t2 disable armv6t2 optimizations
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@ -1635,6 +1636,7 @@ ARCH_EXT_LIST_LOONGSON="
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"
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ARCH_EXT_LIST_X86_SIMD="
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aesni
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amd3dnow
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amd3dnowext
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avx
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@ -2128,6 +2130,7 @@ sse3_deps="sse2"
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ssse3_deps="sse3"
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sse4_deps="ssse3"
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sse42_deps="sse4"
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aesni_deps="sse42"
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avx_deps="sse42"
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xop_deps="avx"
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fma3_deps="avx"
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@ -6011,6 +6014,7 @@ if enabled x86; then
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echo "3DNow! extended enabled ${amd3dnowext-no}"
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echo "SSE enabled ${sse-no}"
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echo "SSSE3 enabled ${ssse3-no}"
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echo "AESNI enabled ${aesni-no}"
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echo "AVX enabled ${avx-no}"
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echo "XOP enabled ${xop-no}"
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echo "FMA3 enabled ${fma3-no}"
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@ -15,6 +15,9 @@ libavutil: 2015-08-28
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API changes, most recent first:
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2015-10-27 - xxxxxxx - lavu 55.5.100 - cpu.h
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Add AV_CPU_FLAG_AESNI.
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2015-10-27 - xxxxxxx - lavc 57.12.100 / 57.8.0 - avcodec.h
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Deprecate av_free_packet(). Use av_packet_unref() as replacement,
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it resets the packet in a more consistent way.
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@ -118,6 +118,7 @@ int av_parse_cpu_flags(const char *s)
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#define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
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#define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX)
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#define CPUFLAG_BMI2 (AV_CPU_FLAG_BMI2 | AV_CPU_FLAG_BMI1)
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#define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)
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static const AVOption cpuflags_opts[] = {
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{ "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
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#if ARCH_PPC
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@ -145,6 +146,7 @@ int av_parse_cpu_flags(const char *s)
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{ "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" },
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{ "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" },
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{ "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
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{ "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI }, .unit = "flags" },
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#elif ARCH_ARM
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{ "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
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{ "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" },
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@ -205,6 +207,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
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{ "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" },
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{ "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
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{ "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
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{ "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
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#define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
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#define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
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@ -340,6 +343,7 @@ static const struct {
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{ AV_CPU_FLAG_AVX2, "avx2" },
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{ AV_CPU_FLAG_BMI1, "bmi1" },
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{ AV_CPU_FLAG_BMI2, "bmi2" },
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{ AV_CPU_FLAG_AESNI, "aesni" },
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#endif
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{ 0 }
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};
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@ -42,6 +42,7 @@
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#define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3 instructions are slower
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#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
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#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
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#define AV_CPU_FLAG_AESNI 0x80000 ///< Advanced Encryption Standard functions
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#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used
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#define AV_CPU_FLAG_AVXSLOW 0x8000000 ///< AVX supported, but slow when using YMM registers (e.g. Bulldozer)
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#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
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@ -56,7 +56,7 @@
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*/
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#define LIBAVUTIL_VERSION_MAJOR 55
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#define LIBAVUTIL_VERSION_MINOR 4
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#define LIBAVUTIL_VERSION_MINOR 5
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#define LIBAVUTIL_VERSION_MICRO 100
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#define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \
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@ -126,6 +126,8 @@ int ff_get_cpu_flags_x86(void)
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rval |= AV_CPU_FLAG_SSE4;
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if (ecx & 0x00100000 )
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rval |= AV_CPU_FLAG_SSE42;
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if (ecx & 0x01000000 )
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rval |= AV_CPU_FLAG_AESNI;
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#if HAVE_AVX
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/* Check OXSAVE and AVX bits */
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if ((ecx & 0x18000000) == 0x18000000) {
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@ -47,6 +47,7 @@
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#define X86_FMA3(flags) CPUEXT(flags, FMA3)
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#define X86_FMA4(flags) CPUEXT(flags, FMA4)
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#define X86_AVX2(flags) CPUEXT(flags, AVX2)
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#define X86_AESNI(flags) CPUEXT(flags, AESNI)
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#define EXTERNAL_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOW)
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#define EXTERNAL_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOWEXT)
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@ -69,6 +70,7 @@
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#define EXTERNAL_FMA3(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA3)
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#define EXTERNAL_FMA4(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA4)
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#define EXTERNAL_AVX2(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX2)
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#define EXTERNAL_AESNI(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AESNI)
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#define INLINE_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOW)
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#define INLINE_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOWEXT)
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@ -91,6 +93,7 @@
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#define INLINE_FMA3(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA3)
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#define INLINE_FMA4(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA4)
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#define INLINE_AVX2(flags) CPUEXT_SUFFIX(flags, _INLINE, AVX2)
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#define INLINE_AESNI(flags) CPUEXT_SUFFIX(flags, _INLINE, AESNI)
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void ff_cpu_cpuid(int index, int *eax, int *ebx, int *ecx, int *edx);
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void ff_cpu_xgetbv(int op, int *eax, int *edx);
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@ -772,6 +772,7 @@ BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge, jng, jnge, ja, jae,
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%assign cpuflags_atom (1<<21)
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%assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
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%assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
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%assign cpuflags_aesni (1<<24)|cpuflags_sse42
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; Returns a boolean value expressing whether or not the specified cpuflag is enabled.
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%define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x)) - 1) >> 31) & 1)
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@ -1171,12 +1172,12 @@ AVX_INSTR addsd, sse2, 1, 0, 1
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AVX_INSTR addss, sse, 1, 0, 1
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AVX_INSTR addsubpd, sse3, 1, 0, 0
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AVX_INSTR addsubps, sse3, 1, 0, 0
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AVX_INSTR aesdec, fnord, 0, 0, 0
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AVX_INSTR aesdeclast, fnord, 0, 0, 0
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AVX_INSTR aesenc, fnord, 0, 0, 0
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AVX_INSTR aesenclast, fnord, 0, 0, 0
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AVX_INSTR aesimc
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AVX_INSTR aeskeygenassist
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AVX_INSTR aesdec, aesni, 0, 0, 0
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AVX_INSTR aesdeclast, aesni, 0, 0, 0
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AVX_INSTR aesenc, aesni, 0, 0, 0
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AVX_INSTR aesenclast, aesni, 0, 0, 0
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AVX_INSTR aesimc, aesni
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AVX_INSTR aeskeygenassist, aesni
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AVX_INSTR andnpd, sse2, 1, 0, 0
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AVX_INSTR andnps, sse, 1, 0, 0
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AVX_INSTR andpd, sse2, 1, 0, 1
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@ -117,6 +117,7 @@ static const struct {
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{ "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM },
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{ "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 },
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{ "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 },
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{ "AES-NI", "aesni", AV_CPU_FLAG_AESNI },
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{ "AVX", "avx", AV_CPU_FLAG_AVX },
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{ "XOP", "xop", AV_CPU_FLAG_XOP },
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{ "FMA3", "fma3", AV_CPU_FLAG_FMA3 },
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