mirror of https://git.ffmpeg.org/ffmpeg.git
dct32: Add SSE2 ASM optimizations
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
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@ -63,6 +63,13 @@ ps_p1p1m1m1: dd 0, 0, 0x80000000, 0x80000000, 0, 0, 0x80000000, 0x80000000
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mulps %1, %3
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mulps %1, %3
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%endmacro
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%endmacro
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%macro BUTTERFLY0_SSE2 5
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pshufd %4, %1, %5
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xorps %1, %2
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addps %1, %4
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mulps %1, %3
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%endmacro
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%macro BUTTERFLY0_AVX 5
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%macro BUTTERFLY0_AVX 5
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vshufps %4, %1, %1, %5
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vshufps %4, %1, %1, %5
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vxorps %1, %1, %2
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vxorps %1, %1, %2
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@ -405,18 +412,17 @@ INIT_XMM
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INIT_XMM
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INIT_XMM
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%macro DCT32_FUNC 1
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; void ff_dct32_float_sse(FFTSample *out, const FFTSample *in)
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; void ff_dct32_float_sse(FFTSample *out, const FFTSample *in)
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cglobal dct32_float_sse, 2,3,16, out, in, tmp
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cglobal dct32_float_%1, 2,3,16, out, in, tmp
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; pass 1
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; pass 1
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movaps m0, [inq+0]
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movaps m0, [inq+0]
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movaps m1, [inq+112]
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LOAD_INV m1, [inq+112]
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shufps m1, m1, 0x1b
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BUTTERFLY m0, m1, [ps_cos_vec], m3
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BUTTERFLY m0, m1, [ps_cos_vec], m3
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movaps m7, [inq+64]
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movaps m7, [inq+64]
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movaps m4, [inq+48]
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LOAD_INV m4, [inq+48]
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shufps m4, m4, 0x1b
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BUTTERFLY m7, m4, [ps_cos_vec+32], m3
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BUTTERFLY m7, m4, [ps_cos_vec+32], m3
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; pass 2
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; pass 2
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@ -427,13 +433,11 @@ cglobal dct32_float_sse, 2,3,16, out, in, tmp
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; pass 1
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; pass 1
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movaps m1, [inq+16]
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movaps m1, [inq+16]
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movaps m6, [inq+96]
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LOAD_INV m6, [inq+96]
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shufps m6, m6, 0x1b
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BUTTERFLY m1, m6, [ps_cos_vec+16], m3
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BUTTERFLY m1, m6, [ps_cos_vec+16], m3
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movaps m4, [inq+80]
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movaps m4, [inq+80]
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movaps m5, [inq+32]
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LOAD_INV m5, [inq+32]
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shufps m5, m5, 0x1b
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BUTTERFLY m4, m5, [ps_cos_vec+48], m3
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BUTTERFLY m4, m5, [ps_cos_vec+48], m3
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; pass 2
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; pass 2
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@ -492,3 +496,20 @@ cglobal dct32_float_sse, 2,3,16, out, in, tmp
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PASS5
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PASS5
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PASS6
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PASS6
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RET
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RET
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%endmacro
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%macro LOAD_INV_SSE 2
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movaps %1, %2
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shufps %1, %1, 0x1b
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%endmacro
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%define LOAD_INV LOAD_INV_SSE
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DCT32_FUNC sse
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%macro LOAD_INV_SSE2 2
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pshufd %1, %2, 0x1b
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%endmacro
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%define LOAD_INV LOAD_INV_SSE2
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%define BUTTERFLY0 BUTTERFLY0_SSE2
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DCT32_FUNC sse2
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@ -60,6 +60,8 @@ av_cold void ff_dct_init_mmx(DCTContext *s)
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int has_vectors = av_get_cpu_flags();
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int has_vectors = av_get_cpu_flags();
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if (has_vectors & AV_CPU_FLAG_AVX && HAVE_AVX)
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if (has_vectors & AV_CPU_FLAG_AVX && HAVE_AVX)
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s->dct32 = ff_dct32_float_avx;
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s->dct32 = ff_dct32_float_avx;
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else if (has_vectors & AV_CPU_FLAG_SSE2 && HAVE_SSE)
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s->dct32 = ff_dct32_float_sse2;
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else if (has_vectors & AV_CPU_FLAG_SSE && HAVE_SSE)
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else if (has_vectors & AV_CPU_FLAG_SSE && HAVE_SSE)
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s->dct32 = ff_dct32_float_sse;
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s->dct32 = ff_dct32_float_sse;
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#endif
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#endif
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@ -35,6 +35,7 @@ void ff_imdct_calc_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
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void ff_imdct_half_sse(FFTContext *s, FFTSample *output, const FFTSample *input);
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void ff_imdct_half_sse(FFTContext *s, FFTSample *output, const FFTSample *input);
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void ff_imdct_half_avx(FFTContext *s, FFTSample *output, const FFTSample *input);
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void ff_imdct_half_avx(FFTContext *s, FFTSample *output, const FFTSample *input);
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void ff_dct32_float_sse(FFTSample *out, const FFTSample *in);
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void ff_dct32_float_sse(FFTSample *out, const FFTSample *in);
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void ff_dct32_float_sse2(FFTSample *out, const FFTSample *in);
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void ff_dct32_float_avx(FFTSample *out, const FFTSample *in);
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void ff_dct32_float_avx(FFTSample *out, const FFTSample *in);
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#endif /* AVCODEC_X86_FFT_H */
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#endif /* AVCODEC_X86_FFT_H */
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