mirror of https://git.ffmpeg.org/ffmpeg.git
avcodec/nvenc: rework library load and GPU selection
Use explicit nvenc capability checks instead to determine usable devices instead of SM versions. Signed-off-by: Timo Rothenpieler <timo@rothenpieler.org>
This commit is contained in:
Andrey Turkin
Timo Rothenpieler
parent
f052ef30ef
commit
0d021cc8b3
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@ -23,34 +23,55 @@
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#if defined(_WIN32)
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#include <windows.h>
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#define CUDA_LIBNAME TEXT("nvcuda.dll")
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#if ARCH_X86_64
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#define NVENC_LIBNAME TEXT("nvEncodeAPI64.dll")
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#else
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#include <dlfcn.h>
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#define NVENC_LIBNAME TEXT("nvEncodeAPI.dll")
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#endif
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#define dlopen(filename, flags) LoadLibrary((filename))
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#define dlsym(handle, symbol) GetProcAddress(handle, symbol)
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#define dlclose(handle) FreeLibrary(handle)
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#else
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#include <dlfcn.h>
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#define CUDA_LIBNAME "libcuda.so"
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#define NVENC_LIBNAME "libnvidia-encode.so"
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#endif
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#include "libavutil/hwcontext.h"
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#include "libavutil/imgutils.h"
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#include "libavutil/avassert.h"
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#include "libavutil/mem.h"
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#include "libavutil/hwcontext.h"
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#include "internal.h"
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#include "thread.h"
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#include "nvenc.h"
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#if CONFIG_CUDA
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#include "libavutil/hwcontext_cuda.h"
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#endif
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#define NVENC_CAP 0x30
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#define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
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rc == NV_ENC_PARAMS_RC_2_PASS_QUALITY || \
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rc == NV_ENC_PARAMS_RC_2_PASS_FRAMESIZE_CAP)
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#if defined(_WIN32)
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#define LOAD_FUNC(l, s) GetProcAddress(l, s)
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#define DL_CLOSE_FUNC(l) FreeLibrary(l)
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#else
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#define LOAD_FUNC(l, s) dlsym(l, s)
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#define DL_CLOSE_FUNC(l) dlclose(l)
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#endif
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#define LOAD_LIBRARY(l, path) \
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do { \
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if (!((l) = dlopen(path, RTLD_LAZY))) { \
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av_log(avctx, AV_LOG_ERROR, \
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"Cannot load %s\n", \
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path); \
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return AVERROR_UNKNOWN; \
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} \
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} while (0)
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#define LOAD_SYMBOL(fun, lib, symbol) \
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do { \
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if (!((fun) = dlsym(lib, symbol))) { \
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av_log(avctx, AV_LOG_ERROR, \
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"Cannot load %s\n", \
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symbol); \
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return AVERROR_UNKNOWN; \
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} \
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} while (0)
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const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
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AV_PIX_FMT_YUV420P,
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@ -62,14 +83,6 @@ const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
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AV_PIX_FMT_NONE
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};
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typedef struct NvencData
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{
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union {
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int64_t timestamp;
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NvencSurface *surface;
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} u;
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} NvencData;
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static const struct {
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NVENCSTATUS nverr;
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int averr;
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@ -142,19 +155,12 @@ static int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
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return timestamp;
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}
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#define CHECK_LOAD_FUNC(t, f, s) \
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do { \
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(f) = (t)LOAD_FUNC(dl_fn->cuda_lib, s); \
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if (!(f)) { \
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av_log(avctx, AV_LOG_FATAL, "Failed loading %s from CUDA library\n", s); \
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goto error; \
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} \
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} while (0)
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static av_cold int nvenc_dyload_cuda(AVCodecContext *avctx)
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static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
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{
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NvencContext *ctx = avctx->priv_data;
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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PNVENCODEAPICREATEINSTANCE nvenc_create_instance;
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NVENCSTATUS err;
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#if CONFIG_CUDA
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dl_fn->cu_init = cuInit;
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@ -165,193 +171,239 @@ static av_cold int nvenc_dyload_cuda(AVCodecContext *avctx)
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dl_fn->cu_ctx_create = cuCtxCreate_v2;
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dl_fn->cu_ctx_pop_current = cuCtxPopCurrent_v2;
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dl_fn->cu_ctx_destroy = cuCtxDestroy_v2;
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return 1;
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#else
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if (dl_fn->cuda_lib)
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return 1;
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LOAD_LIBRARY(dl_fn->cuda, CUDA_LIBNAME);
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#if defined(_WIN32)
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dl_fn->cuda_lib = LoadLibrary(TEXT("nvcuda.dll"));
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#else
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dl_fn->cuda_lib = dlopen("libcuda.so", RTLD_LAZY);
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LOAD_SYMBOL(dl_fn->cu_init, dl_fn->cuda, "cuInit");
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LOAD_SYMBOL(dl_fn->cu_device_get_count, dl_fn->cuda, "cuDeviceGetCount");
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LOAD_SYMBOL(dl_fn->cu_device_get, dl_fn->cuda, "cuDeviceGet");
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LOAD_SYMBOL(dl_fn->cu_device_get_name, dl_fn->cuda, "cuDeviceGetName");
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LOAD_SYMBOL(dl_fn->cu_device_compute_capability, dl_fn->cuda,
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"cuDeviceComputeCapability");
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LOAD_SYMBOL(dl_fn->cu_ctx_create, dl_fn->cuda, "cuCtxCreate_v2");
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LOAD_SYMBOL(dl_fn->cu_ctx_pop_current, dl_fn->cuda, "cuCtxPopCurrent_v2");
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LOAD_SYMBOL(dl_fn->cu_ctx_destroy, dl_fn->cuda, "cuCtxDestroy_v2");
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#endif
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if (!dl_fn->cuda_lib) {
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av_log(avctx, AV_LOG_FATAL, "Failed loading CUDA library\n");
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goto error;
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}
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LOAD_LIBRARY(dl_fn->nvenc, NVENC_LIBNAME);
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CHECK_LOAD_FUNC(PCUINIT, dl_fn->cu_init, "cuInit");
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CHECK_LOAD_FUNC(PCUDEVICEGETCOUNT, dl_fn->cu_device_get_count, "cuDeviceGetCount");
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CHECK_LOAD_FUNC(PCUDEVICEGET, dl_fn->cu_device_get, "cuDeviceGet");
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CHECK_LOAD_FUNC(PCUDEVICEGETNAME, dl_fn->cu_device_get_name, "cuDeviceGetName");
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CHECK_LOAD_FUNC(PCUDEVICECOMPUTECAPABILITY, dl_fn->cu_device_compute_capability, "cuDeviceComputeCapability");
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CHECK_LOAD_FUNC(PCUCTXCREATE, dl_fn->cu_ctx_create, "cuCtxCreate_v2");
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CHECK_LOAD_FUNC(PCUCTXPOPCURRENT, dl_fn->cu_ctx_pop_current, "cuCtxPopCurrent_v2");
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CHECK_LOAD_FUNC(PCUCTXDESTROY, dl_fn->cu_ctx_destroy, "cuCtxDestroy_v2");
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return 1;
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error:
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if (dl_fn->cuda_lib)
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DL_CLOSE_FUNC(dl_fn->cuda_lib);
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dl_fn->cuda_lib = NULL;
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return 0;
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#endif
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}
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static av_cold int check_cuda_errors(AVCodecContext *avctx, CUresult err, const char *func)
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{
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if (err != CUDA_SUCCESS) {
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av_log(avctx, AV_LOG_FATAL, ">> %s - failed with error code 0x%x\n", func, err);
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return 0;
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}
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return 1;
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}
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#define check_cuda_errors(f) if (!check_cuda_errors(avctx, f, #f)) goto error
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static av_cold int nvenc_check_cuda(AVCodecContext *avctx)
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{
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int device_count = 0;
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CUdevice cu_device = 0;
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char gpu_name[128];
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int smminor = 0, smmajor = 0;
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int i, smver, target_smver;
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NvencContext *ctx = avctx->priv_data;
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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switch (avctx->codec->id) {
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case AV_CODEC_ID_H264:
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target_smver = ctx->data_pix_fmt == AV_PIX_FMT_YUV444P ? 0x52 : 0x30;
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break;
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case AV_CODEC_ID_H265:
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target_smver = 0x52;
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break;
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default:
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av_log(avctx, AV_LOG_FATAL, "Unknown codec name\n");
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goto error;
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}
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if (ctx->preset >= PRESET_LOSSLESS_DEFAULT)
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target_smver = 0x52;
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if (!nvenc_dyload_cuda(avctx))
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return 0;
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if (dl_fn->nvenc_device_count > 0)
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return 1;
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check_cuda_errors(dl_fn->cu_init(0));
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check_cuda_errors(dl_fn->cu_device_get_count(&device_count));
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if (!device_count) {
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av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
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goto error;
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}
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av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", device_count);
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dl_fn->nvenc_device_count = 0;
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for (i = 0; i < device_count; ++i) {
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check_cuda_errors(dl_fn->cu_device_get(&cu_device, i));
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check_cuda_errors(dl_fn->cu_device_get_name(gpu_name, sizeof(gpu_name), cu_device));
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check_cuda_errors(dl_fn->cu_device_compute_capability(&smmajor, &smminor, cu_device));
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smver = (smmajor << 4) | smminor;
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av_log(avctx, AV_LOG_VERBOSE, "[ GPU #%d - < %s > has Compute SM %d.%d, NVENC %s ]\n", i, gpu_name, smmajor, smminor, (smver >= target_smver) ? "Available" : "Not Available");
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if (smver >= target_smver)
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dl_fn->nvenc_devices[dl_fn->nvenc_device_count++] = cu_device;
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}
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if (!dl_fn->nvenc_device_count) {
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av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
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goto error;
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}
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return 1;
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error:
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dl_fn->nvenc_device_count = 0;
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return 0;
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}
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static av_cold int nvenc_dyload_nvenc(AVCodecContext *avctx)
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{
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PNVENCODEAPICREATEINSTANCE nvEncodeAPICreateInstance = 0;
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NVENCSTATUS nvstatus;
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NvencContext *ctx = avctx->priv_data;
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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if (!nvenc_check_cuda(avctx))
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return 0;
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if (dl_fn->nvenc_lib)
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return 1;
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#if defined(_WIN32)
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if (sizeof(void*) == 8) {
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dl_fn->nvenc_lib = LoadLibrary(TEXT("nvEncodeAPI64.dll"));
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} else {
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dl_fn->nvenc_lib = LoadLibrary(TEXT("nvEncodeAPI.dll"));
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}
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#else
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dl_fn->nvenc_lib = dlopen("libnvidia-encode.so.1", RTLD_LAZY);
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#endif
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if (!dl_fn->nvenc_lib) {
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av_log(avctx, AV_LOG_FATAL, "Failed loading the nvenc library\n");
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goto error;
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}
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nvEncodeAPICreateInstance = (PNVENCODEAPICREATEINSTANCE)LOAD_FUNC(dl_fn->nvenc_lib, "NvEncodeAPICreateInstance");
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if (!nvEncodeAPICreateInstance) {
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av_log(avctx, AV_LOG_FATAL, "Failed to load nvenc entrypoint\n");
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goto error;
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}
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LOAD_SYMBOL(nvenc_create_instance, dl_fn->nvenc,
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"NvEncodeAPICreateInstance");
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dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
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nvstatus = nvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
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if (nvstatus != NV_ENC_SUCCESS) {
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nvenc_print_error(avctx, nvstatus, "Failed to create nvenc instance");
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goto error;
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}
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err = nvenc_create_instance(&dl_fn->nvenc_funcs);
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if (err != NV_ENC_SUCCESS)
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return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
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av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
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return 1;
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return 0;
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}
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error:
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if (dl_fn->nvenc_lib)
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DL_CLOSE_FUNC(dl_fn->nvenc_lib);
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static av_cold int nvenc_open_session(AVCodecContext *avctx)
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{
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NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
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NvencContext *ctx = avctx->priv_data;
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NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
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NVENCSTATUS ret;
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dl_fn->nvenc_lib = NULL;
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params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
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params.apiVersion = NVENCAPI_VERSION;
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params.device = ctx->cu_context;
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params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
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ret = p_nvenc->nvEncOpenEncodeSessionEx(¶ms, &ctx->nvencoder);
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if (ret != NV_ENC_SUCCESS) {
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ctx->nvencoder = NULL;
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return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
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}
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return 0;
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}
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static int nvenc_check_codec_support(AVCodecContext *avctx)
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{
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NvencContext *ctx = avctx->priv_data;
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NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
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int i, ret, count = 0;
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GUID *guids = NULL;
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ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
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if (ret != NV_ENC_SUCCESS || !count)
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return AVERROR(ENOSYS);
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guids = av_malloc(count * sizeof(GUID));
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if (!guids)
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return AVERROR(ENOMEM);
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ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
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if (ret != NV_ENC_SUCCESS) {
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ret = AVERROR(ENOSYS);
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goto fail;
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}
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ret = AVERROR(ENOSYS);
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for (i = 0; i < count; i++) {
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if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
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ret = 0;
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break;
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}
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}
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fail:
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av_free(guids);
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return ret;
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}
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static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
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{
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NvencContext *ctx = avctx->priv_data;
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NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
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NV_ENC_CAPS_PARAM params = { 0 };
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int ret, val = 0;
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params.version = NV_ENC_CAPS_PARAM_VER;
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params.capsToQuery = cap;
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ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, ¶ms, &val);
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if (ret == NV_ENC_SUCCESS)
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return val;
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return 0;
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}
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static int nvenc_check_capabilities(AVCodecContext *avctx)
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{
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NvencContext *ctx = avctx->priv_data;
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int ret;
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ret = nvenc_check_codec_support(avctx);
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if (ret < 0) {
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av_log(avctx, AV_LOG_VERBOSE, "Codec not supported\n");
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return ret;
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}
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ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
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if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P && ret <= 0) {
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av_log(avctx, AV_LOG_VERBOSE, "YUV444P not supported\n");
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return AVERROR(ENOSYS);
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}
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ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
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if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
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av_log(avctx, AV_LOG_VERBOSE, "Lossless encoding not supported\n");
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return AVERROR(ENOSYS);
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}
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ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
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if (ret < avctx->width) {
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av_log(avctx, AV_LOG_VERBOSE, "Width %d exceeds %d\n",
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avctx->width, ret);
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return AVERROR(ENOSYS);
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}
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ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
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if (ret < avctx->height) {
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av_log(avctx, AV_LOG_VERBOSE, "Height %d exceeds %d\n",
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avctx->height, ret);
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return AVERROR(ENOSYS);
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}
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ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
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if (ret < avctx->max_b_frames) {
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av_log(avctx, AV_LOG_VERBOSE, "Max b-frames %d exceed %d\n",
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avctx->max_b_frames, ret);
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return AVERROR(ENOSYS);
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}
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return 0;
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}
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static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
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{
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NvencContext *ctx = avctx->priv_data;
|
||||
NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
|
||||
NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
|
||||
char name[128] = { 0};
|
||||
int major, minor, ret;
|
||||
CUresult cu_res;
|
||||
CUdevice cu_device;
|
||||
CUcontext dummy;
|
||||
int loglevel = AV_LOG_VERBOSE;
|
||||
|
||||
if (ctx->device == LIST_DEVICES)
|
||||
loglevel = AV_LOG_INFO;
|
||||
|
||||
cu_res = dl_fn->cu_device_get(&cu_device, idx);
|
||||
if (cu_res != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_ERROR,
|
||||
"Cannot access the CUDA device %d\n",
|
||||
idx);
|
||||
return -1;
|
||||
}
|
||||
|
||||
cu_res = dl_fn->cu_device_get_name(name, sizeof(name), cu_device);
|
||||
if (cu_res != CUDA_SUCCESS)
|
||||
return -1;
|
||||
|
||||
cu_res = dl_fn->cu_device_compute_capability(&major, &minor, cu_device);
|
||||
if (cu_res != CUDA_SUCCESS)
|
||||
return -1;
|
||||
|
||||
av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
|
||||
if (((major << 4) | minor) < NVENC_CAP) {
|
||||
av_log(avctx, loglevel, "does not support NVENC\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
cu_res = dl_fn->cu_ctx_create(&ctx->cu_context_internal, 0, cu_device);
|
||||
if (cu_res != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_FATAL, "Failed creating CUDA context for NVENC: 0x%x\n", (int)cu_res);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
ctx->cu_context = ctx->cu_context_internal;
|
||||
|
||||
cu_res = dl_fn->cu_ctx_pop_current(&dummy);
|
||||
if (cu_res != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_FATAL, "Failed popping CUDA context: 0x%x\n", (int)cu_res);
|
||||
goto fail2;
|
||||
}
|
||||
|
||||
if ((ret = nvenc_open_session(avctx)) < 0)
|
||||
goto fail2;
|
||||
|
||||
if ((ret = nvenc_check_capabilities(avctx)) < 0)
|
||||
goto fail3;
|
||||
|
||||
av_log(avctx, loglevel, "supports NVENC\n");
|
||||
|
||||
dl_fn->nvenc_device_count++;
|
||||
|
||||
if (ctx->device == dl_fn->nvenc_device_count - 1 || ctx->device == ANY_DEVICE)
|
||||
return 0;
|
||||
|
||||
fail3:
|
||||
p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
|
||||
ctx->nvencoder = NULL;
|
||||
|
||||
fail2:
|
||||
dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
|
||||
ctx->cu_context_internal = NULL;
|
||||
|
||||
fail:
|
||||
return AVERROR(ENOSYS);
|
||||
}
|
||||
|
||||
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
|
||||
{
|
||||
NvencContext *ctx = avctx->priv_data;
|
||||
NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
|
||||
|
||||
CUresult cu_res;
|
||||
CUcontext cu_context_curr;
|
||||
|
||||
switch (avctx->codec->id) {
|
||||
case AV_CODEC_ID_H264:
|
||||
ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
|
||||
|
|
@ -363,71 +415,72 @@ static av_cold int nvenc_setup_device(AVCodecContext *avctx)
|
|||
return AVERROR_BUG;
|
||||
}
|
||||
|
||||
ctx->data_pix_fmt = avctx->pix_fmt;
|
||||
|
||||
#if CONFIG_CUDA
|
||||
if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
|
||||
AVHWFramesContext *frames_ctx;
|
||||
#if CONFIG_CUDA
|
||||
AVHWFramesContext *frames_ctx;
|
||||
AVCUDADeviceContext *device_hwctx;
|
||||
int ret;
|
||||
|
||||
if (!avctx->hw_frames_ctx) {
|
||||
av_log(avctx, AV_LOG_ERROR, "hw_frames_ctx must be set when using GPU frames as input\n");
|
||||
if (!avctx->hw_frames_ctx)
|
||||
return AVERROR(EINVAL);
|
||||
|
||||
frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
|
||||
device_hwctx = frames_ctx->device_ctx->hwctx;
|
||||
|
||||
ctx->cu_context = device_hwctx->cuda_ctx;
|
||||
|
||||
ret = nvenc_open_session(avctx);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = nvenc_check_capabilities(avctx);
|
||||
if (ret < 0) {
|
||||
av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
return AVERROR_BUG;
|
||||
#endif
|
||||
} else {
|
||||
int i, nb_devices = 0;
|
||||
|
||||
if ((dl_fn->cu_init(0)) != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_ERROR,
|
||||
"Cannot init CUDA\n");
|
||||
return AVERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
|
||||
device_hwctx = frames_ctx->device_ctx->hwctx;
|
||||
ctx->cu_context = device_hwctx->cuda_ctx;
|
||||
ctx->data_pix_fmt = frames_ctx->sw_format;
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
if ((dl_fn->cu_device_get_count(&nb_devices)) != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_ERROR,
|
||||
"Cannot enumerate the CUDA devices\n");
|
||||
return AVERROR_UNKNOWN;
|
||||
}
|
||||
|
||||
if (ctx->gpu >= dl_fn->nvenc_device_count) {
|
||||
av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->gpu, dl_fn->nvenc_device_count);
|
||||
if (!nb_devices) {
|
||||
av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
|
||||
return AVERROR_EXTERNAL;
|
||||
}
|
||||
|
||||
av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
|
||||
|
||||
dl_fn->nvenc_device_count = 0;
|
||||
for (i = 0; i < nb_devices; ++i) {
|
||||
if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (ctx->device == LIST_DEVICES)
|
||||
return AVERROR_EXIT;
|
||||
|
||||
if (!dl_fn->nvenc_device_count) {
|
||||
av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
|
||||
return AVERROR_EXTERNAL;
|
||||
}
|
||||
|
||||
av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, dl_fn->nvenc_device_count);
|
||||
return AVERROR(EINVAL);
|
||||
}
|
||||
|
||||
ctx->cu_context = NULL;
|
||||
cu_res = dl_fn->cu_ctx_create(&ctx->cu_context_internal, 4, dl_fn->nvenc_devices[ctx->gpu]); // CU_CTX_SCHED_BLOCKING_SYNC=4, avoid CPU spins
|
||||
|
||||
if (cu_res != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_FATAL, "Failed creating CUDA context for NVENC: 0x%x\n", (int)cu_res);
|
||||
return AVERROR_EXTERNAL;
|
||||
}
|
||||
|
||||
cu_res = dl_fn->cu_ctx_pop_current(&cu_context_curr);
|
||||
|
||||
if (cu_res != CUDA_SUCCESS) {
|
||||
av_log(avctx, AV_LOG_FATAL, "Failed popping CUDA context: 0x%x\n", (int)cu_res);
|
||||
return AVERROR_EXTERNAL;
|
||||
}
|
||||
|
||||
ctx->cu_context = ctx->cu_context_internal;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static av_cold int nvenc_open_session(AVCodecContext *avctx)
|
||||
{
|
||||
NvencContext *ctx = avctx->priv_data;
|
||||
NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
|
||||
NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
|
||||
|
||||
NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS encode_session_params = { 0 };
|
||||
NVENCSTATUS nv_status;
|
||||
|
||||
encode_session_params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
|
||||
encode_session_params.apiVersion = NVENCAPI_VERSION;
|
||||
encode_session_params.device = ctx->cu_context;
|
||||
encode_session_params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
|
||||
|
||||
nv_status = p_nvenc->nvEncOpenEncodeSessionEx(&encode_session_params, &ctx->nvencoder);
|
||||
if (nv_status != NV_ENC_SUCCESS) {
|
||||
ctx->nvencoder = NULL;
|
||||
return nvenc_print_error(avctx, nv_status, "OpenEncodeSessionEx failed");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1081,14 +1134,16 @@ av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
|
|||
dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
|
||||
ctx->cu_context = ctx->cu_context_internal = NULL;
|
||||
|
||||
DL_CLOSE_FUNC(dl_fn->nvenc_lib);
|
||||
dl_fn->nvenc_lib = NULL;
|
||||
if (dl_fn->nvenc)
|
||||
dlclose(dl_fn->nvenc);
|
||||
dl_fn->nvenc = NULL;
|
||||
|
||||
dl_fn->nvenc_device_count = 0;
|
||||
|
||||
#if !CONFIG_CUDA
|
||||
DL_CLOSE_FUNC(dl_fn->cuda_lib);
|
||||
dl_fn->cuda_lib = NULL;
|
||||
if (dl_fn->cuda)
|
||||
dlclose(dl_fn->cuda);
|
||||
dl_fn->cuda = NULL;
|
||||
#endif
|
||||
|
||||
dl_fn->cu_init = NULL;
|
||||
|
|
@ -1107,26 +1162,37 @@ av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
|
|||
|
||||
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
|
||||
{
|
||||
int res;
|
||||
NvencContext *ctx = avctx->priv_data;
|
||||
int ret;
|
||||
|
||||
if (!nvenc_dyload_nvenc(avctx))
|
||||
return AVERROR_EXTERNAL;
|
||||
if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
|
||||
AVHWFramesContext *frames_ctx;
|
||||
if (!avctx->hw_frames_ctx) {
|
||||
av_log(avctx, AV_LOG_ERROR,
|
||||
"hw_frames_ctx must be set when using GPU frames as input\n");
|
||||
return AVERROR(EINVAL);
|
||||
}
|
||||
frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
|
||||
ctx->data_pix_fmt = frames_ctx->sw_format;
|
||||
} else {
|
||||
ctx->data_pix_fmt = avctx->pix_fmt;
|
||||
}
|
||||
|
||||
if ((res = nvenc_setup_device(avctx)) < 0)
|
||||
return res;
|
||||
if ((ret = nvenc_load_libraries(avctx)) < 0)
|
||||
return ret;
|
||||
|
||||
if ((res = nvenc_open_session(avctx)) < 0)
|
||||
return res;
|
||||
if ((ret = nvenc_setup_device(avctx)) < 0)
|
||||
return ret;
|
||||
|
||||
if ((res = nvenc_setup_encoder(avctx)) < 0)
|
||||
return res;
|
||||
if ((ret = nvenc_setup_encoder(avctx)) < 0)
|
||||
return ret;
|
||||
|
||||
if ((res = nvenc_setup_surfaces(avctx)) < 0)
|
||||
return res;
|
||||
if ((ret = nvenc_setup_surfaces(avctx)) < 0)
|
||||
return ret;
|
||||
|
||||
if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
|
||||
if ((res = nvenc_setup_extradata(avctx)) < 0)
|
||||
return res;
|
||||
if ((ret = nvenc_setup_extradata(avctx)) < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
#include "avcodec.h"
|
||||
|
||||
#if CONFIG_CUDA
|
||||
#include <cuda.h>
|
||||
#include "libavutil/hwcontext_cuda.h"
|
||||
#else
|
||||
|
||||
#if defined(_WIN32)
|
||||
|
|
@ -77,17 +77,9 @@ typedef NVENCSTATUS (NVENCAPI *PNVENCODEAPICREATEINSTANCE)(NV_ENCODE_API_FUNCTIO
|
|||
typedef struct NvencDynLoadFunctions
|
||||
{
|
||||
#if !CONFIG_CUDA
|
||||
#if defined(_WIN32)
|
||||
HMODULE cuda_lib;
|
||||
#else
|
||||
void* cuda_lib;
|
||||
#endif
|
||||
#endif
|
||||
#if defined(_WIN32)
|
||||
HMODULE nvenc_lib;
|
||||
#else
|
||||
void* nvenc_lib;
|
||||
void *cuda;
|
||||
#endif
|
||||
void *nvenc;
|
||||
|
||||
PCUINIT cu_init;
|
||||
PCUDEVICEGETCOUNT cu_device_get_count;
|
||||
|
|
@ -100,8 +92,6 @@ typedef struct NvencDynLoadFunctions
|
|||
|
||||
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs;
|
||||
int nvenc_device_count;
|
||||
CUdevice nvenc_devices[16];
|
||||
|
||||
} NvencDynLoadFunctions;
|
||||
|
||||
enum {
|
||||
|
|
@ -133,6 +123,11 @@ enum {
|
|||
NVENC_TWO_PASSES = 8,
|
||||
};
|
||||
|
||||
enum {
|
||||
LIST_DEVICES = -2,
|
||||
ANY_DEVICE,
|
||||
};
|
||||
|
||||
typedef struct NvencContext
|
||||
{
|
||||
AVClass *avclass;
|
||||
|
|
@ -173,7 +168,7 @@ typedef struct NvencContext
|
|||
int rc;
|
||||
int cbr;
|
||||
int twopass;
|
||||
int gpu;
|
||||
int device;
|
||||
int flags;
|
||||
int async_depth;
|
||||
} NvencContext;
|
||||
|
|
|
|||
|
|
@ -79,7 +79,9 @@ static const AVOption options[] = {
|
|||
{ "surfaces", "Number of concurrent surfaces", OFFSET(nb_surfaces), AV_OPT_TYPE_INT, { .i64 = 32 }, 0, INT_MAX, VE },
|
||||
{ "cbr", "Use cbr encoding mode", OFFSET(cbr), AV_OPT_TYPE_BOOL, { .i64 = 0 }, 0, 1, VE },
|
||||
{ "2pass", "Use 2pass encoding mode", OFFSET(twopass), AV_OPT_TYPE_BOOL, { .i64 = -1 }, -1, 1, VE },
|
||||
{ "gpu", "Selects which NVENC capable GPU to use. First GPU is 0, second is 1, and so on.", OFFSET(gpu), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, INT_MAX, VE },
|
||||
{ "gpu", "Selects which NVENC capable GPU to use. First GPU is 0, second is 1, and so on.", OFFSET(device), AV_OPT_TYPE_INT, { .i64 = ANY_DEVICE }, -2, INT_MAX, VE, "gpu" },
|
||||
{ "any", "Pick the first device available", 0, AV_OPT_TYPE_CONST, { .i64 = ANY_DEVICE }, 0, 0, VE, "gpu" },
|
||||
{ "list", "List the available devices", 0, AV_OPT_TYPE_CONST, { .i64 = LIST_DEVICES }, 0, 0, VE, "gpu" },
|
||||
{ "delay", "Delay frame output by the given amount of frames", OFFSET(async_depth), AV_OPT_TYPE_INT, { .i64 = INT_MAX }, 0, INT_MAX, VE },
|
||||
{ NULL }
|
||||
};
|
||||
|
|
|
|||
|
|
@ -76,7 +76,9 @@ static const AVOption options[] = {
|
|||
{ "surfaces", "Number of concurrent surfaces", OFFSET(nb_surfaces), AV_OPT_TYPE_INT, { .i64 = 32 }, 0, INT_MAX, VE },
|
||||
{ "cbr", "Use cbr encoding mode", OFFSET(cbr), AV_OPT_TYPE_BOOL, { .i64 = 0 }, 0, 1, VE },
|
||||
{ "2pass", "Use 2pass encoding mode", OFFSET(twopass), AV_OPT_TYPE_BOOL, { .i64 = -1 }, -1, 1, VE },
|
||||
{ "gpu", "Selects which NVENC capable GPU to use. First GPU is 0, second is 1, and so on.", OFFSET(gpu), AV_OPT_TYPE_INT, { .i64 = 0 }, 0, INT_MAX, VE },
|
||||
{ "gpu", "Selects which NVENC capable GPU to use. First GPU is 0, second is 1, and so on.", OFFSET(device), AV_OPT_TYPE_INT, { .i64 = ANY_DEVICE }, -2, INT_MAX, VE },
|
||||
{ "any", "Pick the first device available", 0, AV_OPT_TYPE_CONST, { .i64 = ANY_DEVICE }, 0, 0, VE, "device" },
|
||||
{ "list", "List the available devices", 0, AV_OPT_TYPE_CONST, { .i64 = LIST_DEVICES }, 0, 0, VE, "device" },
|
||||
{ "delay", "Delay frame output by the given amount of frames", OFFSET(async_depth), AV_OPT_TYPE_INT, { .i64 = INT_MAX }, 0, INT_MAX, VE },
|
||||
{ NULL }
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue