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x86/me_cmp: port mmxext and sse2 sad functions to yasm
Also add a missing c->pix_abs[0][0] initialization, and sse2 versions of sad16_x2, sad16_y2 and sad16_xy2 (%15 to %20 faster than mmxext). Since the _xy2 versions are not bitexact, they are accordingly marked as approximate. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
James Almer
Michael Niedermayer
parent
f1a8943ddd
commit
0456d169c4
@ -23,6 +23,10 @@
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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cextern pb_1
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SECTION .text
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%macro DIFF_PIXELS_1 4
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@ -465,3 +469,329 @@ cglobal hf_noise%1, 3,3,0, pix1, lsize, h
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INIT_MMX mmx
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HF_NOISE 8
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HF_NOISE 16
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;---------------------------------------------------------------------------------------
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;int ff_sad_<opt>(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2, int stride, int h);
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;---------------------------------------------------------------------------------------
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INIT_MMX mmxext
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cglobal sad8, 4, 4, 0, v, pix1, pix2, stride
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movu m2, [pix2q]
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movu m1, [pix2q+strideq]
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psadbw m2, [pix1q]
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psadbw m1, [pix1q+strideq]
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paddw m2, m1
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%rep 3
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lea pix1q, [pix1q+strideq*2]
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lea pix2q, [pix2q+strideq*2]
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movu m0, [pix2q]
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movu m1, [pix2q+strideq]
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psadbw m0, [pix1q]
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psadbw m1, [pix1q+strideq]
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paddw m2, m0
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paddw m2, m1
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%endrep
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movd eax, m2
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RET
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%macro SAD16 0
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cglobal sad16, 5, 5, 3, v, pix1, pix2, stride, h
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pxor m2, m2
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align 16
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.loop
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movu m0, [pix2q]
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movu m1, [pix2q+strideq]
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psadbw m0, [pix1q]
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psadbw m1, [pix1q+strideq]
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paddw m2, m0
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paddw m2, m1
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%if mmsize == 8
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movu m0, [pix2q+8]
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movu m1, [pix2q+strideq+8]
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psadbw m0, [pix1q+8]
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psadbw m1, [pix1q+strideq+8]
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paddw m2, m0
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paddw m2, m1
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%endif
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lea pix1q, [pix1q+strideq*2]
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lea pix2q, [pix2q+strideq*2]
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sub hd, 2
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jg .loop
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%if mmsize == 16
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movhlps m0, m2
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paddw m2, m0
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%endif
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movd eax, m2
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RET
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%endmacro
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INIT_MMX mmxext
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SAD16
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INIT_XMM sse2
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SAD16
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;------------------------------------------------------------------------------------------
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;int ff_sad_x2_<opt>(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2, int stride, int h);
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;------------------------------------------------------------------------------------------
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INIT_MMX mmxext
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cglobal sad8_x2, 4, 4, 0, v, pix1, pix2, stride
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movu m0, [pix2q]
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movu m2, [pix2q+strideq]
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pavgb m0, [pix2q+1]
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pavgb m2, [pix2q+strideq+1]
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psadbw m0, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m2
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%rep 3
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lea pix1q, [pix1q+2*strideq]
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lea pix2q, [pix2q+2*strideq]
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movu m1, [pix2q]
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movu m2, [pix2q+strideq]
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pavgb m1, [pix2q+1]
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pavgb m2, [pix2q+strideq+1]
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psadbw m1, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m1
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paddw m0, m2
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%endrep
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movd eax, m0
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RET
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%macro SAD16_X2 0
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cglobal sad16_x2, 5, 5, 5, v, pix1, pix2, stride, h
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pxor m0, m0
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align 16
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.loop:
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movu m1, [pix2q]
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movu m2, [pix2q+strideq]
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%if mmsize == 16
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movu m3, [pix2q+1]
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movu m4, [pix2q+strideq+1]
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pavgb m1, m3
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pavgb m2, m4
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%else
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pavgb m1, [pix2q+1]
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pavgb m2, [pix2q+strideq+1]
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%endif
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psadbw m1, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m1
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paddw m0, m2
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%if mmsize == 8
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movu m1, [pix2q+8]
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movu m2, [pix2q+strideq+8]
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pavgb m1, [pix2q+9]
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pavgb m2, [pix2q+strideq+9]
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psadbw m1, [pix1q+8]
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psadbw m2, [pix1q+strideq+8]
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paddw m0, m1
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paddw m0, m2
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%endif
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lea pix1q, [pix1q+2*strideq]
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lea pix2q, [pix2q+2*strideq]
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sub hd, 2
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jg .loop
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%if mmsize == 16
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movhlps m1, m0
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paddw m0, m1
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%endif
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movd eax, m0
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RET
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%endmacro
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INIT_MMX mmxext
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SAD16_X2
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INIT_XMM sse2
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SAD16_X2
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;------------------------------------------------------------------------------------------
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;int ff_sad_y2_<opt>(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2, int stride, int h);
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;------------------------------------------------------------------------------------------
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INIT_MMX mmxext
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cglobal sad8_y2, 4, 4, 0, v, pix1, pix2, stride
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movu m1, [pix2q]
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movu m0, [pix2q+strideq]
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movu m3, [pix2q+2*strideq]
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pavgb m1, m0
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pavgb m0, m3
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add pix2q, strideq
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psadbw m1, [pix1q]
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psadbw m0, [pix1q+strideq]
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paddw m0, m1
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mova m1, m3
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%rep 3
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lea pix1q, [pix1q+2*strideq]
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lea pix2q, [pix2q+2*strideq]
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movu m2, [pix2q]
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movu m3, [pix2q+strideq]
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pavgb m1, m2
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pavgb m2, m3
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psadbw m1, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m1
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paddw m0, m2
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mova m1, m3
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%endrep
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movd eax, m0
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RET
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%macro SAD16_Y2 0
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cglobal sad16_y2, 5, 5, 4, v, pix1, pix2, stride, h
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movu m1, [pix2q]
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%if mmsize == 8
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movu m4, [pix2q+8]
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%endif
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pxor m0, m0
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add pix2q, strideq
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align 16
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.loop:
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movu m2, [pix2q]
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movu m3, [pix2q+strideq]
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pavgb m1, m2
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pavgb m2, m3
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psadbw m1, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m1
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paddw m0, m2
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mova m1, m3
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%if mmsize == 8
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movu m5, [pix2q+8]
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movu m6, [pix2q+strideq+8]
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pavgb m4, m5
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pavgb m5, m6
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psadbw m4, [pix1q+8]
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psadbw m5, [pix1q+strideq+8]
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paddw m0, m4
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paddw m0, m5
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mova m4, m6
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%endif
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lea pix1q, [pix1q+2*strideq]
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lea pix2q, [pix2q+2*strideq]
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sub hd, 2
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jg .loop
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%if mmsize == 16
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movhlps m1, m0
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paddw m0, m1
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%endif
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movd eax, m0
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RET
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%endmacro
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INIT_MMX mmxext
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SAD16_Y2
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INIT_XMM sse2
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SAD16_Y2
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;-------------------------------------------------------------------------------------------
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;int ff_sad_approx_xy2_<opt>(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2, int stride, int h);
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;-------------------------------------------------------------------------------------------
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INIT_MMX mmxext
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cglobal sad8_approx_xy2, 4, 4, 0, v, pix1, pix2, stride
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pxor m0, m0
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mova m4, [pb_1]
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movu m1, [pix2q]
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movu m0, [pix2q+strideq]
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movu m3, [pix2q+2*strideq]
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pavgb m1, [pix2q+1]
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pavgb m0, [pix2q+strideq+1]
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pavgb m3, [pix2q+2*strideq+1]
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psubusb m0, m4
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pavgb m1, m0
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pavgb m0, m3
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add pix2q, strideq
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psadbw m1, [pix1q]
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psadbw m0, [pix1q+strideq]
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paddw m0, m1
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mova m1, m3
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%rep 3
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lea pix1q, [pix1q+2*strideq]
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lea pix2q, [pix2q+2*strideq]
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movu m2, [pix2q]
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movu m3, [pix2q+strideq]
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pavgb m2, [pix2q+1]
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pavgb m3, [pix2q+strideq+1]
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psubusb m2, m4
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pavgb m1, m2
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pavgb m2, m3
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psadbw m1, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m1
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paddw m0, m2
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mova m1, m3
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%endrep
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movd eax, m0
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RET
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%macro SAD16_APPROX_XY2 0
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cglobal sad16_approx_xy2, 5, 5, 7, v, pix1, pix2, stride, h
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pxor m0, m0
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mova m4, [pb_1]
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movu m1, [pix2q]
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%if mmsize == 16
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movu m2, [pix2q+1]
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pavgb m1, m2
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%else
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movu m5, [pix2q+8]
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pavgb m1, [pix2q+1]
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pavgb m5, [pix2q+8+1]
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%endif
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add pix2q, strideq
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align 16
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.loop:
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movu m2, [pix2q]
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movu m3, [pix2q+strideq]
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%if mmsize == 16
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movu m5, [pix2q+1]
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movu m6, [pix2q+strideq+1]
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pavgb m2, m5
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pavgb m3, m6
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%else
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pavgb m2, [pix2q+1]
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pavgb m3, [pix2q+strideq+1]
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%endif
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psubusb m2, m4
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pavgb m1, m2
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pavgb m2, m3
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psadbw m1, [pix1q]
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psadbw m2, [pix1q+strideq]
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paddw m0, m1
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paddw m0, m2
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mova m1, m3
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%if mmsize == 8
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movu m6, [pix2q+8]
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movu m7, [pix2q+strideq+8]
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pavgb m6, [pix2q+8+1]
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pavgb m7, [pix2q+strideq+8+1]
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psubusb m6, m4
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pavgb m5, m6
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pavgb m6, m7
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psadbw m5, [pix1q+8]
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psadbw m6, [pix1q+strideq+8]
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paddw m0, m5
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paddw m0, m6
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mova m5, m7
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%endif
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lea pix1q, [pix1q+2*strideq]
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lea pix2q, [pix2q+2*strideq]
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sub hd, 2
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jg .loop
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%if mmsize == 16
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movhlps m1, m0
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paddw m0, m1
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%endif
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movd eax, m0
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RET
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%endmacro
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INIT_MMX mmxext
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SAD16_APPROX_XY2
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INIT_XMM sse2
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SAD16_APPROX_XY2
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@ -41,6 +41,30 @@ int ff_sse16_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int line_size, int h);
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int ff_hf_noise8_mmx(uint8_t *pix1, int lsize, int h);
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int ff_hf_noise16_mmx(uint8_t *pix1, int lsize, int h);
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int ff_sad8_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad8_x2_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_x2_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_x2_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad8_y2_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_y2_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_y2_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad8_approx_xy2_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_approx_xy2_mmxext(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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int ff_sad16_approx_xy2_sse2(MpegEncContext *v, uint8_t *pix1, uint8_t *pix2,
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int stride, int h);
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#define hadamard_func(cpu) \
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int ff_hadamard8_diff_ ## cpu(MpegEncContext *s, uint8_t *src1, \
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@ -345,8 +369,6 @@ DECLARE_ASM_CONST(8, uint64_t, round_tab)[3] = {
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0x0002000200020002ULL,
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};
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DECLARE_ASM_CONST(8, uint64_t, bone) = 0x0101010101010101LL;
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static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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{
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x86_reg len = -(x86_reg)stride * h;
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@ -382,130 +404,6 @@ static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
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: "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg) stride));
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}
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static inline void sad8_1_mmxext(uint8_t *blk1, uint8_t *blk2,
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int stride, int h)
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{
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__asm__ volatile (
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".p2align 4 \n\t"
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"1: \n\t"
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"movq (%1), %%mm0 \n\t"
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"movq (%1, %3), %%mm1 \n\t"
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"psadbw (%2), %%mm0 \n\t"
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"psadbw (%2, %3), %%mm1 \n\t"
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"paddw %%mm0, %%mm6 \n\t"
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"paddw %%mm1, %%mm6 \n\t"
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"lea (%1,%3,2), %1 \n\t"
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"lea (%2,%3,2), %2 \n\t"
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"sub $2, %0 \n\t"
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" jg 1b \n\t"
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: "+r" (h), "+r" (blk1), "+r" (blk2)
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: "r" ((x86_reg) stride));
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}
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static int sad16_sse2(MpegEncContext *v, uint8_t *blk2, uint8_t *blk1,
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int stride, int h)
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{
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int ret;
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__asm__ volatile (
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"pxor %%xmm2, %%xmm2 \n\t"
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".p2align 4 \n\t"
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"1: \n\t"
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"movdqu (%1), %%xmm0 \n\t"
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"movdqu (%1, %4), %%xmm1 \n\t"
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"psadbw (%2), %%xmm0 \n\t"
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"psadbw (%2, %4), %%xmm1 \n\t"
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"paddw %%xmm0, %%xmm2 \n\t"
|
||||
"paddw %%xmm1, %%xmm2 \n\t"
|
||||
"lea (%1,%4,2), %1 \n\t"
|
||||
"lea (%2,%4,2), %2 \n\t"
|
||||
"sub $2, %0 \n\t"
|
||||
" jg 1b \n\t"
|
||||
"movhlps %%xmm2, %%xmm0 \n\t"
|
||||
"paddw %%xmm0, %%xmm2 \n\t"
|
||||
"movd %%xmm2, %3 \n\t"
|
||||
: "+r" (h), "+r" (blk1), "+r" (blk2), "=r" (ret)
|
||||
: "r" ((x86_reg) stride));
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void sad8_x2a_mmxext(uint8_t *blk1, uint8_t *blk2,
|
||||
int stride, int h)
|
||||
{
|
||||
__asm__ volatile (
|
||||
".p2align 4 \n\t"
|
||||
"1: \n\t"
|
||||
"movq (%1), %%mm0 \n\t"
|
||||
"movq (%1, %3), %%mm1 \n\t"
|
||||
"pavgb 1(%1), %%mm0 \n\t"
|
||||
"pavgb 1(%1, %3), %%mm1 \n\t"
|
||||
"psadbw (%2), %%mm0 \n\t"
|
||||
"psadbw (%2, %3), %%mm1 \n\t"
|
||||
"paddw %%mm0, %%mm6 \n\t"
|
||||
"paddw %%mm1, %%mm6 \n\t"
|
||||
"lea (%1,%3,2), %1 \n\t"
|
||||
"lea (%2,%3,2), %2 \n\t"
|
||||
"sub $2, %0 \n\t"
|
||||
" jg 1b \n\t"
|
||||
: "+r" (h), "+r" (blk1), "+r" (blk2)
|
||||
: "r" ((x86_reg) stride));
|
||||
}
|
||||
|
||||
static inline void sad8_y2a_mmxext(uint8_t *blk1, uint8_t *blk2,
|
||||
int stride, int h)
|
||||
{
|
||||
__asm__ volatile (
|
||||
"movq (%1), %%mm0 \n\t"
|
||||
"add %3, %1 \n\t"
|
||||
".p2align 4 \n\t"
|
||||
"1: \n\t"
|
||||
"movq (%1), %%mm1 \n\t"
|
||||
"movq (%1, %3), %%mm2 \n\t"
|
||||
"pavgb %%mm1, %%mm0 \n\t"
|
||||
"pavgb %%mm2, %%mm1 \n\t"
|
||||
"psadbw (%2), %%mm0 \n\t"
|
||||
"psadbw (%2, %3), %%mm1 \n\t"
|
||||
"paddw %%mm0, %%mm6 \n\t"
|
||||
"paddw %%mm1, %%mm6 \n\t"
|
||||
"movq %%mm2, %%mm0 \n\t"
|
||||
"lea (%1,%3,2), %1 \n\t"
|
||||
"lea (%2,%3,2), %2 \n\t"
|
||||
"sub $2, %0 \n\t"
|
||||
" jg 1b \n\t"
|
||||
: "+r" (h), "+r" (blk1), "+r" (blk2)
|
||||
: "r" ((x86_reg) stride));
|
||||
}
|
||||
|
||||
static inline void sad8_4_mmxext(uint8_t *blk1, uint8_t *blk2,
|
||||
int stride, int h)
|
||||
{
|
||||
__asm__ volatile (
|
||||
"movq "MANGLE(bone)", %%mm5 \n\t"
|
||||
"movq (%1), %%mm0 \n\t"
|
||||
"pavgb 1(%1), %%mm0 \n\t"
|
||||
"add %3, %1 \n\t"
|
||||
".p2align 4 \n\t"
|
||||
"1: \n\t"
|
||||
"movq (%1), %%mm1 \n\t"
|
||||
"movq (%1,%3), %%mm2 \n\t"
|
||||
"pavgb 1(%1), %%mm1 \n\t"
|
||||
"pavgb 1(%1,%3), %%mm2 \n\t"
|
||||
"psubusb %%mm5, %%mm1 \n\t"
|
||||
"pavgb %%mm1, %%mm0 \n\t"
|
||||
"pavgb %%mm2, %%mm1 \n\t"
|
||||
"psadbw (%2), %%mm0 \n\t"
|
||||
"psadbw (%2,%3), %%mm1 \n\t"
|
||||
"paddw %%mm0, %%mm6 \n\t"
|
||||
"paddw %%mm1, %%mm6 \n\t"
|
||||
"movq %%mm2, %%mm0 \n\t"
|
||||
"lea (%1,%3,2), %1 \n\t"
|
||||
"lea (%2,%3,2), %2 \n\t"
|
||||
"sub $2, %0 \n\t"
|
||||
" jg 1b \n\t"
|
||||
: "+r" (h), "+r" (blk1), "+r" (blk2)
|
||||
: "r" ((x86_reg) stride)
|
||||
NAMED_CONSTRAINTS_ADD(bone));
|
||||
}
|
||||
|
||||
static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2,
|
||||
int stride, int h)
|
||||
{
|
||||
@ -613,15 +511,6 @@ static inline int sum_mmx(void)
|
||||
return ret & 0xFFFF;
|
||||
}
|
||||
|
||||
static inline int sum_mmxext(void)
|
||||
{
|
||||
int ret;
|
||||
__asm__ volatile (
|
||||
"movd %%mm6, %0 \n\t"
|
||||
: "=r" (ret));
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h)
|
||||
{
|
||||
sad8_2_mmx(blk1, blk1 + 1, blk2, stride, h);
|
||||
@ -750,7 +639,6 @@ static int sad16_xy2_ ## suf(MpegEncContext *v, uint8_t *blk2, \
|
||||
} \
|
||||
|
||||
PIX_SAD(mmx)
|
||||
PIX_SAD(mmxext)
|
||||
|
||||
#endif /* HAVE_INLINE_ASM */
|
||||
|
||||
@ -782,29 +670,11 @@ av_cold void ff_me_cmp_init_x86(MECmpContext *c, AVCodecContext *avctx)
|
||||
if (INLINE_MMXEXT(cpu_flags)) {
|
||||
c->vsad[4] = vsad_intra16_mmxext;
|
||||
|
||||
c->pix_abs[0][0] = sad16_mmxext;
|
||||
c->pix_abs[1][0] = sad8_mmxext;
|
||||
|
||||
c->sad[0] = sad16_mmxext;
|
||||
c->sad[1] = sad8_mmxext;
|
||||
|
||||
c->pix_abs[0][1] = sad16_x2_mmxext;
|
||||
c->pix_abs[0][2] = sad16_y2_mmxext;
|
||||
c->pix_abs[1][1] = sad8_x2_mmxext;
|
||||
c->pix_abs[1][2] = sad8_y2_mmxext;
|
||||
|
||||
if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
|
||||
c->pix_abs[0][3] = sad16_xy2_mmxext;
|
||||
c->pix_abs[1][3] = sad8_xy2_mmxext;
|
||||
|
||||
c->vsad[0] = vsad16_mmxext;
|
||||
}
|
||||
}
|
||||
|
||||
if (INLINE_SSE2(cpu_flags) && !(cpu_flags & AV_CPU_FLAG_SSE2SLOW) && avctx->codec_id != AV_CODEC_ID_SNOW) {
|
||||
c->sad[0] = sad16_sse2;
|
||||
}
|
||||
|
||||
#endif /* HAVE_INLINE_ASM */
|
||||
|
||||
if (EXTERNAL_MMX(cpu_flags)) {
|
||||
@ -823,6 +693,21 @@ av_cold void ff_me_cmp_init_x86(MECmpContext *c, AVCodecContext *avctx)
|
||||
c->hadamard8_diff[0] = ff_hadamard8_diff16_mmxext;
|
||||
c->hadamard8_diff[1] = ff_hadamard8_diff_mmxext;
|
||||
c->sum_abs_dctelem = ff_sum_abs_dctelem_mmxext;
|
||||
|
||||
c->sad[0] = ff_sad16_mmxext;
|
||||
c->sad[1] = ff_sad8_mmxext;
|
||||
|
||||
c->pix_abs[0][0] = ff_sad16_mmxext;
|
||||
c->pix_abs[0][1] = ff_sad16_x2_mmxext;
|
||||
c->pix_abs[0][2] = ff_sad16_y2_mmxext;
|
||||
c->pix_abs[1][0] = ff_sad8_mmxext;
|
||||
c->pix_abs[1][1] = ff_sad8_x2_mmxext;
|
||||
c->pix_abs[1][2] = ff_sad8_y2_mmxext;
|
||||
|
||||
if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
|
||||
c->pix_abs[0][3] = ff_sad16_approx_xy2_mmxext;
|
||||
c->pix_abs[1][3] = ff_sad8_approx_xy2_mmxext;
|
||||
}
|
||||
}
|
||||
|
||||
if (EXTERNAL_SSE2(cpu_flags)) {
|
||||
@ -833,6 +718,16 @@ av_cold void ff_me_cmp_init_x86(MECmpContext *c, AVCodecContext *avctx)
|
||||
c->hadamard8_diff[0] = ff_hadamard8_diff16_sse2;
|
||||
c->hadamard8_diff[1] = ff_hadamard8_diff_sse2;
|
||||
#endif
|
||||
if (!(cpu_flags & AV_CPU_FLAG_SSE2SLOW) && avctx->codec_id != AV_CODEC_ID_SNOW) {
|
||||
c->sad[0] = ff_sad16_sse2;
|
||||
c->pix_abs[0][0] = ff_sad16_sse2;
|
||||
c->pix_abs[0][1] = ff_sad16_x2_sse2;
|
||||
c->pix_abs[0][2] = ff_sad16_y2_sse2;
|
||||
|
||||
if (!(avctx->flags & CODEC_FLAG_BITEXACT)) {
|
||||
c->pix_abs[0][3] = ff_sad16_approx_xy2_sse2;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (EXTERNAL_SSSE3(cpu_flags)) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user