mirror of
https://github.com/ceph/ceph
synced 2024-12-21 10:54:42 +00:00
b0ae5ae2ad
ARMv8 defines PMULL crypto instruction. This patch optimizes crc32c calculate with the instruction when available rather than original linear crc instructions. ceph crc32c performance unit test shows that the optimization get ~ x3.90 speedups on ThunderX ARM Core@2.0GHz (Cavium) ~ x1.45 speedups on ARM Cortex-A57@2.1GHz (Huaiwei) ~ x1.16 speedups on ARM Cortex-A57@2.0GHz (Softiron) Jira: ENTLLT-358 Change-Id: I657422cd20c9ca78237cd060210a5383f4122575 Signed-off-by: wei xiao <wei.xiao@linaro.org>
90 lines
2.9 KiB
CMake
90 lines
2.9 KiB
CMake
# detect SIMD extentions
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#
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# HAVE_ARMV8_CRC
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# HAVE_ARMV8_SIMD
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# HAVE_ARM_NEON
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# HAVE_INTEL_SSE
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# HAVE_INTEL_SSE2
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# HAVE_INTEL_SSE3
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# HAVE_INTEL_SSSE3
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# HAVE_INTEL_PCLMUL
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# HAVE_INTEL_SSE4_1
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# HAVE_INTEL_SSE4_2
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#
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# SIMD_COMPILE_FLAGS
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#
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if(CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64|AARCH64")
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set(HAVE_ARM 1)
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set(save_quiet ${CMAKE_REQUIRED_QUIET})
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set(CMAKE_REQUIRED_QUIET true)
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include(CheckCXXSourceCompiles)
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check_cxx_source_compiles("
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#define CRC32CX(crc, value) __asm__(\"crc32cx %w[c], %w[c], %x[v]\":[c]\"+r\"(crc):[v]\"r\"(value))
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asm(\".arch_extension crc\");
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unsigned int foo(unsigned int ret) {
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CRC32CX(ret, 0);
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return ret;
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}
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int main() { foo(0); }" HAVE_ARMV8_CRC)
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check_cxx_source_compiles("
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asm(\".arch_extension crypto\");
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unsigned int foo(unsigned int ret) {
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__asm__(\"pmull v2.1q, v2.1d, v1.1d\");
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return ret;
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}
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int main() { foo(0); }" HAVE_ARMV8_CRYPTO)
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set(CMAKE_REQUIRED_QUIET ${save_quiet})
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if(HAVE_ARMV8_CRC)
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message(STATUS " aarch64 crc extensions supported")
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endif()
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if(HAVE_ARMV8_CRYPTO)
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message(STATUS " aarch64 crypto extensions supported")
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endif()
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CHECK_C_COMPILER_FLAG(-march=armv8-a+crc+crypto HAVE_ARMV8_CRC_CRYPTO_INTRINSICS)
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if(HAVE_ARMV8_CRC_CRYPTO_INTRINSICS)
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message(STATUS " aarch64 crc+crypto intrinsics supported")
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set(ARMV8_CRC_COMPILE_FLAGS "${ARMV8_CRC_COMPILE_FLAGS} -march=armv8-a+crc+crypto")
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endif()
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CHECK_C_COMPILER_FLAG(-march=armv8-a+simd HAVE_ARMV8_SIMD)
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if(HAVE_ARMV8_SIMD)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -march=armv8-a+simd")
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endif()
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elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "arm|ARM")
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set(HAVE_ARM 1)
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CHECK_C_COMPILER_FLAG(-mfpu=neon HAVE_ARM_NEON)
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if(HAVE_ARM_NEON)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -mfpu=neon")
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endif()
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elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "i386|i686|amd64|x86_64|AMD64")
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set(HAVE_INTEL 1)
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CHECK_C_COMPILER_FLAG(-msse HAVE_INTEL_SSE)
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if(HAVE_INTEL_SSE)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse")
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endif()
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CHECK_C_COMPILER_FLAG(-msse2 HAVE_INTEL_SSE2)
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if(HAVE_INTEL_SSE2)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse2")
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endif()
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CHECK_C_COMPILER_FLAG(-msse3 HAVE_INTEL_SSE3)
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if(HAVE_INTEL_SSE3)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse3")
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endif()
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CHECK_C_COMPILER_FLAG(-mssse3 HAVE_INTEL_SSSE3)
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if(HAVE_INTEL_SSSE3)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -mssse3")
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endif()
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CHECK_C_COMPILER_FLAG(-mpclmul HAVE_INTEL_PCLMUL)
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if(HAVE_INTEL_PCLMUL)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -mpclmul")
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endif()
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CHECK_C_COMPILER_FLAG(-msse4.1 HAVE_INTEL_SSE4_1)
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if(HAVE_INTEL_SSE4_1)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse4.1")
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endif()
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CHECK_C_COMPILER_FLAG(-msse4.2 HAVE_INTEL_SSE4_2)
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if(HAVE_INTEL_SSE4_2)
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set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse4.2")
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endif()
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endif()
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