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ceph/cmake/modules/SIMDExt.cmake

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cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
# detect SIMD extentions
#
# HAVE_ARMV8_CRC
erasure-code: Remove SIMD flavors for jerasure and shec By switching to a new gf-complete with SIMD runtime detection, we can now remove all the different flavors of jerasure and shec. This simplifies deployment and configuration of erasure coding, enables hetergenous OSDs, and enables us to take advantage of new performance improvements in jerasure without config/build changes. This commit removes flavors from cmake, removes ErasureCodePluginSelect___, and fixes unit tests. There is now a single plugin for jerasure and a single plugin for shec. SIMDExt.cmake was changed so that its a little more generic, and is not polluted with gf-complete specific CFLAG defines. The #define for SIMD instruction were based on gf-complete. I also added a small init helper for jerasure that has code that was common between jerasure and shec. Signed-off-by: Bassam Tabbara <bassam.tabbara@quantum.com>
2016-09-22 19:40:52 +00:00
# HAVE_ARMV8_SIMD
# HAVE_ARM_NEON
# HAVE_INTEL_SSE
# HAVE_INTEL_SSE2
# HAVE_INTEL_SSE3
# HAVE_INTEL_SSSE3
# HAVE_INTEL_PCLMUL
# HAVE_INTEL_SSE4_1
# HAVE_INTEL_SSE4_2
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
#
erasure-code: Remove SIMD flavors for jerasure and shec By switching to a new gf-complete with SIMD runtime detection, we can now remove all the different flavors of jerasure and shec. This simplifies deployment and configuration of erasure coding, enables hetergenous OSDs, and enables us to take advantage of new performance improvements in jerasure without config/build changes. This commit removes flavors from cmake, removes ErasureCodePluginSelect___, and fixes unit tests. There is now a single plugin for jerasure and a single plugin for shec. SIMDExt.cmake was changed so that its a little more generic, and is not polluted with gf-complete specific CFLAG defines. The #define for SIMD instruction were based on gf-complete. I also added a small init helper for jerasure that has code that was common between jerasure and shec. Signed-off-by: Bassam Tabbara <bassam.tabbara@quantum.com>
2016-09-22 19:40:52 +00:00
# SIMD_COMPILE_FLAGS
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
#
if(CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64|AARCH64")
erasure-code: Backward compatibility with legacy EC plugins Resurrected jerasure_generic, jerasure_sse3, jerasure_sse4, jerasure_neon, shec_generic, shec_sse3, shec_sse4 and shec_neon. These all are exact copies of the new jerasure and shec plugins that support SIMD detection. Moved EC preload code in ceph-mon and ceph-osd to a central location, added warning when preloading legacy plugins. OSMonitor::get_erasure_code and OSDMonitor:normalize_profile will now check if legacy EC plugins are used and log a warning. Added tests to check that warnings make it to the log. Signed-off-by: Bassam Tabbara <bassam.tabbara@quantum.com>
2016-09-21 14:00:01 +00:00
set(HAVE_ARM 1)
AArch64: Detect crc32 extension support from assembler The used compiler may or may not be recent enough to recognize the crc32 extended cpu type. However, it does not really have to know about them either, since all we do is pass inline assembly instructions to the assembler. This patch moves the crc cpu extension detection from compiler based to assembler based, so that we can build optimized code even when the compiler does not know about the cpu type yet. Fixes: http://tracker.ceph.com/issues/17516 Signed-off-by: Alexander Graf <agraf@suse.de>
2016-09-26 14:26:37 +00:00
set(save_quiet ${CMAKE_REQUIRED_QUIET})
set(CMAKE_REQUIRED_QUIET true)
include(CheckCXXSourceCompiles)
cmake/modules/SIMDExt.cmake: add whitespace readability, man, readability Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:10:15 +00:00
AArch64: Detect crc32 extension support from assembler The used compiler may or may not be recent enough to recognize the crc32 extended cpu type. However, it does not really have to know about them either, since all we do is pass inline assembly instructions to the assembler. This patch moves the crc cpu extension detection from compiler based to assembler based, so that we can build optimized code even when the compiler does not know about the cpu type yet. Fixes: http://tracker.ceph.com/issues/17516 Signed-off-by: Alexander Graf <agraf@suse.de>
2016-09-26 14:26:37 +00:00
check_cxx_source_compiles("
#define CRC32CX(crc, value) __asm__(\"crc32cx %w[c], %w[c], %x[v]\":[c]\"+r\"(crc):[v]\"r\"(value))
asm(\".arch_extension crc\");
unsigned int foo(unsigned int ret) {
CRC32CX(ret, 0);
return ret;
}
int main() { foo(0); }" HAVE_ARMV8_CRC)
crc32c: optimize aarch64 crc32c implementation ARMv8 defines PMULL crypto instruction. This patch optimizes crc32c calculate with the instruction when available rather than original linear crc instructions. ceph crc32c performance unit test shows that the optimization get ~ x3.90 speedups on ThunderX ARM Core@2.0GHz (Cavium) ~ x1.45 speedups on ARM Cortex-A57@2.1GHz (Huaiwei) ~ x1.16 speedups on ARM Cortex-A57@2.0GHz (Softiron) Jira: ENTLLT-358 Change-Id: I657422cd20c9ca78237cd060210a5383f4122575 Signed-off-by: wei xiao <wei.xiao@linaro.org>
2017-01-13 04:36:39 +00:00
check_cxx_source_compiles("
asm(\".arch_extension crypto\");
unsigned int foo(unsigned int ret) {
__asm__(\"pmull v2.1q, v2.1d, v1.1d\");
return ret;
}
int main() { foo(0); }" HAVE_ARMV8_CRYPTO)
cmake/modules/SIMDExt.cmake: add whitespace readability, man, readability Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:10:15 +00:00
AArch64: Detect crc32 extension support from assembler The used compiler may or may not be recent enough to recognize the crc32 extended cpu type. However, it does not really have to know about them either, since all we do is pass inline assembly instructions to the assembler. This patch moves the crc cpu extension detection from compiler based to assembler based, so that we can build optimized code even when the compiler does not know about the cpu type yet. Fixes: http://tracker.ceph.com/issues/17516 Signed-off-by: Alexander Graf <agraf@suse.de>
2016-09-26 14:26:37 +00:00
set(CMAKE_REQUIRED_QUIET ${save_quiet})
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
if(HAVE_ARMV8_CRC)
AArch64: Detect crc32 extension support from assembler The used compiler may or may not be recent enough to recognize the crc32 extended cpu type. However, it does not really have to know about them either, since all we do is pass inline assembly instructions to the assembler. This patch moves the crc cpu extension detection from compiler based to assembler based, so that we can build optimized code even when the compiler does not know about the cpu type yet. Fixes: http://tracker.ceph.com/issues/17516 Signed-off-by: Alexander Graf <agraf@suse.de>
2016-09-26 14:26:37 +00:00
message(STATUS " aarch64 crc extensions supported")
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
endif()
cmake/modules/SIMDExt.cmake: add whitespace readability, man, readability Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:10:15 +00:00
crc32c: optimize aarch64 crc32c implementation ARMv8 defines PMULL crypto instruction. This patch optimizes crc32c calculate with the instruction when available rather than original linear crc instructions. ceph crc32c performance unit test shows that the optimization get ~ x3.90 speedups on ThunderX ARM Core@2.0GHz (Cavium) ~ x1.45 speedups on ARM Cortex-A57@2.1GHz (Huaiwei) ~ x1.16 speedups on ARM Cortex-A57@2.0GHz (Softiron) Jira: ENTLLT-358 Change-Id: I657422cd20c9ca78237cd060210a5383f4122575 Signed-off-by: wei xiao <wei.xiao@linaro.org>
2017-01-13 04:36:39 +00:00
if(HAVE_ARMV8_CRYPTO)
message(STATUS " aarch64 crypto extensions supported")
endif()
cmake/modules/SIMDExt.cmake: armv8 crypto intrinsics Test not only for -march support, but also the actual presence of the intrinsic routines. Not sure why, but gcc 4.8.5 passes the first but not the second. Fixes: http://tracker.ceph.com/issues/19386 Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:12:38 +00:00
CHECK_C_COMPILER_FLAG(-march=armv8-a+crc+crypto HAVE_ARMV8_CRC_CRYPTO_MARCH)
# don't believe only the -march support; gcc 4.8.5 on RHEL/CentOS says
# it supports +crc but hasn't got the intrinsics or arm_acle.h. Test for
# the actual presence of one of the intrinsic functions.
if(HAVE_ARMV8_CRC_CRYPTO_MARCH)
check_cxx_source_compiles("
#include <inttypes.h>
int main() { uint32_t a; uint8_t b; __builtin_aarch64_crc32b(a, b); }
" HAVE_ARMV8_CRC_CRYPTO_INTRINSICS)
endif()
crc32c: optimize aarch64 crc32c implementation ARMv8 defines PMULL crypto instruction. This patch optimizes crc32c calculate with the instruction when available rather than original linear crc instructions. ceph crc32c performance unit test shows that the optimization get ~ x3.90 speedups on ThunderX ARM Core@2.0GHz (Cavium) ~ x1.45 speedups on ARM Cortex-A57@2.1GHz (Huaiwei) ~ x1.16 speedups on ARM Cortex-A57@2.0GHz (Softiron) Jira: ENTLLT-358 Change-Id: I657422cd20c9ca78237cd060210a5383f4122575 Signed-off-by: wei xiao <wei.xiao@linaro.org>
2017-01-13 04:36:39 +00:00
if(HAVE_ARMV8_CRC_CRYPTO_INTRINSICS)
message(STATUS " aarch64 crc+crypto intrinsics supported")
set(ARMV8_CRC_COMPILE_FLAGS "${ARMV8_CRC_COMPILE_FLAGS} -march=armv8-a+crc+crypto")
endif()
cmake/modules/SIMDExt.cmake: add whitespace readability, man, readability Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:10:15 +00:00
erasure-code: Remove SIMD flavors for jerasure and shec By switching to a new gf-complete with SIMD runtime detection, we can now remove all the different flavors of jerasure and shec. This simplifies deployment and configuration of erasure coding, enables hetergenous OSDs, and enables us to take advantage of new performance improvements in jerasure without config/build changes. This commit removes flavors from cmake, removes ErasureCodePluginSelect___, and fixes unit tests. There is now a single plugin for jerasure and a single plugin for shec. SIMDExt.cmake was changed so that its a little more generic, and is not polluted with gf-complete specific CFLAG defines. The #define for SIMD instruction were based on gf-complete. I also added a small init helper for jerasure that has code that was common between jerasure and shec. Signed-off-by: Bassam Tabbara <bassam.tabbara@quantum.com>
2016-09-22 19:40:52 +00:00
CHECK_C_COMPILER_FLAG(-march=armv8-a+simd HAVE_ARMV8_SIMD)
if(HAVE_ARMV8_SIMD)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -march=armv8-a+simd")
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
endif()
cmake/modules/SIMDExt.cmake: add whitespace readability, man, readability Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:10:15 +00:00
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "arm|ARM")
crc32c: optimize aarch64 crc32c implementation ARMv8 defines PMULL crypto instruction. This patch optimizes crc32c calculate with the instruction when available rather than original linear crc instructions. ceph crc32c performance unit test shows that the optimization get ~ x3.90 speedups on ThunderX ARM Core@2.0GHz (Cavium) ~ x1.45 speedups on ARM Cortex-A57@2.1GHz (Huaiwei) ~ x1.16 speedups on ARM Cortex-A57@2.0GHz (Softiron) Jira: ENTLLT-358 Change-Id: I657422cd20c9ca78237cd060210a5383f4122575 Signed-off-by: wei xiao <wei.xiao@linaro.org>
2017-01-13 04:36:39 +00:00
set(HAVE_ARM 1)
erasure-code: Remove SIMD flavors for jerasure and shec By switching to a new gf-complete with SIMD runtime detection, we can now remove all the different flavors of jerasure and shec. This simplifies deployment and configuration of erasure coding, enables hetergenous OSDs, and enables us to take advantage of new performance improvements in jerasure without config/build changes. This commit removes flavors from cmake, removes ErasureCodePluginSelect___, and fixes unit tests. There is now a single plugin for jerasure and a single plugin for shec. SIMDExt.cmake was changed so that its a little more generic, and is not polluted with gf-complete specific CFLAG defines. The #define for SIMD instruction were based on gf-complete. I also added a small init helper for jerasure that has code that was common between jerasure and shec. Signed-off-by: Bassam Tabbara <bassam.tabbara@quantum.com>
2016-09-22 19:40:52 +00:00
CHECK_C_COMPILER_FLAG(-mfpu=neon HAVE_ARM_NEON)
if(HAVE_ARM_NEON)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -mfpu=neon")
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
endif()
cmake/modules/SIMDExt.cmake: add whitespace readability, man, readability Signed-off-by: Dan Mick <dan.mick@redhat.com>
2017-03-25 03:10:15 +00:00
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "i386|i686|amd64|x86_64|AMD64")
crc32c: optimize aarch64 crc32c implementation ARMv8 defines PMULL crypto instruction. This patch optimizes crc32c calculate with the instruction when available rather than original linear crc instructions. ceph crc32c performance unit test shows that the optimization get ~ x3.90 speedups on ThunderX ARM Core@2.0GHz (Cavium) ~ x1.45 speedups on ARM Cortex-A57@2.1GHz (Huaiwei) ~ x1.16 speedups on ARM Cortex-A57@2.0GHz (Softiron) Jira: ENTLLT-358 Change-Id: I657422cd20c9ca78237cd060210a5383f4122575 Signed-off-by: wei xiao <wei.xiao@linaro.org>
2017-01-13 04:36:39 +00:00
set(HAVE_INTEL 1)
build: misc fixes for cmake build on i386 Scope SIMD CPU flag detection base on target architecture, resolving build failures in gf-complete on i386; this is inline with the previous autotools based feature detection. Only compile crypto/isa-l if yasm 64 bit complier is found, effectively limiting scope to x86_64. Signed-off-by: James Page <james.page@ubuntu.com>
2017-06-06 14:01:40 +00:00
if(CMAKE_SYSTEM_PROCESSOR MATCHES "i686|amd64|x86_64|AMD64")
CHECK_C_COMPILER_FLAG(-msse HAVE_INTEL_SSE)
if(HAVE_INTEL_SSE)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse")
endif()
if(CMAKE_SYSTEM_PROCESSOR MATCHES "amd64|x86_64|AMD64")
CHECK_C_COMPILER_FLAG(-msse2 HAVE_INTEL_SSE2)
if(HAVE_INTEL_SSE2)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse2")
endif()
CHECK_C_COMPILER_FLAG(-msse3 HAVE_INTEL_SSE3)
if(HAVE_INTEL_SSE3)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse3")
endif()
CHECK_C_COMPILER_FLAG(-mssse3 HAVE_INTEL_SSSE3)
if(HAVE_INTEL_SSSE3)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -mssse3")
endif()
CHECK_C_COMPILER_FLAG(-mpclmul HAVE_INTEL_PCLMUL)
if(HAVE_INTEL_PCLMUL)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -mpclmul")
endif()
CHECK_C_COMPILER_FLAG(-msse4.1 HAVE_INTEL_SSE4_1)
if(HAVE_INTEL_SSE4_1)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse4.1")
endif()
CHECK_C_COMPILER_FLAG(-msse4.2 HAVE_INTEL_SSE4_2)
if(HAVE_INTEL_SSE4_2)
set(SIMD_COMPILE_FLAGS "${SIMD_COMPILE_FLAGS} -msse4.2")
endif()
endif(CMAKE_SYSTEM_PROCESSOR MATCHES "amd64|x86_64|AMD64")
endif(CMAKE_SYSTEM_PROCESSOR MATCHES "i686|amd64|x86_64|AMD64")
Fix ppc64 support for ceph The ppc64 support requires a couple of changes: - adding the ppc64 support to cmake - changing optimized crc32 code to compile on ppc64le only - moving ifdef condition before crc32_align to avoid defined but not used warning Signed-off-by: Boris Ranto <branto@redhat.com>
2017-07-31 17:50:23 +00:00
elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "(powerpc|ppc)64|(powerpc|ppc)64le")
if(CMAKE_SYSTEM_PROCESSOR MATCHES "(powerpc|ppc)64le")
set(HAVE_PPC64LE 1)
message(STATUS " we are ppc64le")
else()
set(HAVE_PPC64 1)
message(STATUS " we are ppc64")
endif(CMAKE_SYSTEM_PROCESSOR MATCHES "(powerpc|ppc)64le")
cmake: extract ppc64le detection into SIMDExt.cmake Signed-off-by: Kefu Chai <kchai@redhat.com>
2017-04-02 17:01:52 +00:00
CHECK_C_COMPILER_FLAG("-maltivec" HAS_ALTIVEC)
if(HAS_ALTIVEC)
message(STATUS " HAS_ALTIVEC yes")
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maltivec")
set(CMAKE_CXX_FLAGS "${CMAKE_C_FLAGS} -maltivec")
endif()
CHECK_C_COMPILER_FLAG("-mcpu=power8" HAVE_POWER8)
if(HAVE_POWER8)
message(STATUS " HAVE_POWER8 yes")
endif()
cmake: pass -DINTEL* to gf-complete cflags * in addition to the -march=foobar, we also need to pass -DFOOBAR to gf-complete sources' cflags, so that the SIMD instructions can be generated as expected. * also extract the compiler support for instruction extensions detections into SIMDExt.cmake. * and only check the compiler support if CMAKE_SYSTEM_PROCESSOR matches with the instruction-set/arch to be checked. Signed-off-by: tone.zhang <tone.zhang@linaro.org> Signed-off-by: Kefu Chai <kchai@redhat.com>
2016-09-02 06:38:21 +00:00
endif()