Commit Graph

6 Commits

Author SHA1 Message Date
David Sterba 21aa6777b2 btrfs-progs: clean up includes, using include-what-you-use
Signed-off-by: David Sterba <dsterba@suse.com>
2023-10-03 01:11:57 +02:00
David Sterba 03f41ac508 btrfs-progs: detect PCLMUL CPU support for accelerated crc32c
The accelerated crc32c needs to check for two CPU features, the crc32c
instructions is in SSE 4.2 and 'pclmulqdq' is a separate. There's still
old hardware used that does not have the PCLMUL instructions. Detect it
and make it the condition.

The pclmul is not supported on old compilers so also add a
configure-time detection and leave the SSE 4.2 only implementation as
the accelerated one if possible.

Issue: #676
Signed-off-by: David Sterba <dsterba@suse.com>
2023-09-13 00:38:50 +02:00
David Sterba 83ac6e0a72 btrfs-progs: crypto: make the PCL implementation default for crc32c
Drop the old native intel implementation and use the PCL one. Remove the
artifical CPU flags.

Signed-off-by: David Sterba <dsterba@suse.com>
2023-08-28 17:24:24 +02:00
David Sterba 992be8b50a btrfs-progs: crypto: add PCL based implementation for crc32c
Copy faster implementation of crc32c from linux kernel as of 6.5-rc7
(x86_64, arch/x86/crypto/crc32c-pcl-intel-asm_64.S). This needs
assembler build support, so detect target architecture so
cross-compilation still works.

Add a special CPU flag so the old and new implementations can be
benchmarked and verified separately.

Sample benchmark:

CPU flags: 0x1ff
CPU features: SSE2 SSSE3 SSE41 SSE42 SHA AVX AVX2 CRC32C_PCL
Block size:     4096
Iterations:     1000000
Implementation: builtin
Units:          CPU cycles

      NULL-NOP: cycles:     77177218, cycles/i       77
   NULL-MEMCPY: cycles:    226313072, cycles/i      226,    62133.395 MiB/s
    CRC32C-ref: cycles:  24418596066, cycles/i    24418,      575.859 MiB/s
     CRC32C-NI: cycles:   1188335920, cycles/i     1188,    11833.073 MiB/s
    CRC32C-PCL: cycles:    463193456, cycles/i      463,    30358.037 MiB/s
        XXHASH: cycles:    851606646, cycles/i      851,    16511.916 MiB/s
    SHA256-ref: cycles:  74476234956, cycles/i    74476,      188.808 MiB/s
     SHA256-NI: cycles:  34198637428, cycles/i    34198,      411.177 MiB/s
    BLAKE2-ref: cycles:  14761411664, cycles/i    14761,      952.597 MiB/s
   BLAKE2-SSE2: cycles:  18101896796, cycles/i    18101,      776.807 MiB/s
  BLAKE2-SSE41: cycles:  12599091062, cycles/i    12599,     1116.087 MiB/s
   BLAKE2-AVX2: cycles:   9668247506, cycles/i     9668,     1454.418 MiB/s

The new implementation is about 2.5x faster.

Note: there new version does not work on musl because of linkage
problems (relocations in .rodata), so it's still using the old
implementation.

Signed-off-by: David Sterba <dsterba@suse.com>
2023-08-28 17:24:24 +02:00
David Sterba 7fba4bf4db btrfs-progs: add special CPU flag bit representing no features
Add CPU_FLAG_NONE that's first in the list and represents a CPU without
any acceleration features. Can be used for reference/fallback
implementation.

Signed-off-by: David Sterba <dsterba@suse.com>
2023-02-28 19:49:31 +01:00
David Sterba 3157c572e1 btrfs-progs: add run-time CPU feature detection
Add support for run-time detection of CPU features on x86_64 to allow
selection of accelerated implementations of hash algorithms.

When possible use the compiler builtin (works on gcc and clang).
The SHA extensions can't be detected by __builtin_cpu_supports and the
__cpuid/__cpuidex macros are not consistently provided in all supported
gcc and clang versions. Copy the __cpuidex and call it manually for the
SHA extensions. Complete list https://en.wikipedia.org/wiki/CPUID .

Signed-off-by: David Sterba <dsterba@suse.com>
2023-02-18 17:44:03 +01:00