mirror of
https://github.com/dense-analysis/ale
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b8bf7b220d
* Added VHDL file support with ghdl compiler * Update ghdl.vim * Create vcom.vim * Create xvhdl.vim * Update xvlog.vim * Added documentation for VHDL & Verilog linters * Added tests to VHDL & Verilog linters
93 lines
3.7 KiB
Plaintext
93 lines
3.7 KiB
Plaintext
===============================================================================
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ALE VHDL Integration *ale-vhdl-options*
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===============================================================================
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ALE can use three different linters for VHDL:
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iverilog:
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Using `iverilog -t null -Wall`
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ModelSim/Questa
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Using `vcom -2008 -quiet -lint`
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Vivado
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Using `xvhdl --2008`
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Note all linters default to VHDL-2008 support. This, and other options, can be
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changed with each linter's respective option variable.
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Linters/compilers that utilize a "work" directory for analyzing designs- such
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as ModelSim and Vivado- can be passed the location of these directories as
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part of their respective option strings listed below. This is useful for
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holistic analysis of a file (e.g. a design with components, packages, or other
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code defined external to the current file as part of a larger project) or
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when wanting to simply pass an alternative location for the auto-generated
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work directories (such as '/tmp') so as to not muddle the current directory.
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Since these type of linters often use this work directory for holding compiled
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design data as part of a single build process, they sometimes cannot handle
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the frequent, asynchronous application launches when linting while text is
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changing. This can happen in the form of hangs or crashes. To help prevent
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this when using these linters, it may help to run linting less frequently; for
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example, only when a file is saved.
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===============================================================================
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ghdl *ale-vhdl-ghdl*
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g:ale_vhdl_ghdl_executable *g:ale_vhdl_ghdl_executable*
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*b:ale_vhdl_ghdl_executable*
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Type: |String|
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Default: `'ghdl'`
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This variable can be changed to the path to the 'ghdl' executable.
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g:ale_vhdl_ghdl_options *g:ale_vhdl_ghdl_options*
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*b:ale_vhdl_ghdl_options*
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Type: |String|
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Default: `'--std=08'`
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This variable can be changed to modify the flags/options passed to 'ghdl'.
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===============================================================================
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vcom *ale-vhdl-vcom*
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g:ale_vhdl_vcom_executable *g:ale_vhdl_vcom_executable*
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*b:ale_vhdl_vcom_executable*
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Type: |String|
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Default: `'vcom'`
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This variable can be changed to the path to the 'vcom' executable.
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g:ale_vhdl_vcom_options *g:ale_vhdl_vcom_options*
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*b:ale_vhdl_vcom_options*
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Type: |String|
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Default: `'-2008 -quiet -lint'`
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This variable can be changed to modify the flags/options passed to 'vcom'.
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===============================================================================
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xvhdl *ale-vhdl-xvhdl*
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g:ale_vhdl_xvhdl_executable *g:ale_vhdl_xvhdl_executable*
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*b:ale_vhdl_xvhdl_executable*
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Type: |String|
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Default: `'xvhdl'`
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This variable can be changed to the path to the 'xvhdl' executable.
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g:ale_vhdl_xvhdl_options *g:ale_vhdl_xvhdl_options*
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*b:ale_vhdl_xvhdl_options*
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Type: |String|
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Default: `'--2008'`
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This variable can be changed to modify the flags/options passed to 'xvhdl'.
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===============================================================================
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vim:tw=78:ts=2:sts=2:sw=2:ft=help:norl:
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