mirror of
https://github.com/dense-analysis/ale
synced 2024-12-19 04:45:31 +00:00
b8bf7b220d
* Added VHDL file support with ghdl compiler * Update ghdl.vim * Create vcom.vim * Create xvhdl.vim * Update xvlog.vim * Added documentation for VHDL & Verilog linters * Added tests to VHDL & Verilog linters
20 lines
525 B
Plaintext
20 lines
525 B
Plaintext
Before:
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call ale#assert#SetUpLinterTest('vhdl', 'vcom')
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After:
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unlet! b:command_tail
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call ale#assert#TearDownLinterTest()
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Execute(The executable should be configurable):
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AssertLinter 'vcom', ale#Escape('vcom') . ' -2008 -quiet -lint %t'
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let b:ale_vhdl_vcom_executable = 'foobar'
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AssertLinter 'foobar', ale#Escape('foobar') . ' -2008 -quiet -lint %t'
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Execute(The options should be configurable):
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let b:ale_vhdl_vcom_options = '--something'
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AssertLinter 'vcom', ale#Escape('vcom') . ' --something %t'
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