Remove unused variables and change .c compilation rule
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4
Makefile
4
Makefile
@ -40,8 +40,8 @@ OBJ = ${SRC:.c=.o}
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all: ${OBJ}
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all: ${OBJ}
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.c.o:
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%.o: %.c
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${CC} -c ${CFLAGS} $<
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${CC} -c ${CFLAGS} -o $@ $<
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clean:
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clean:
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rm -f ${OBJ}
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rm -f ${OBJ}
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