2016-03-18 06:28:29 +00:00
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/*
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* This file is part of mpv.
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*
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* mpv is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* mpv is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with mpv. If not, see <http://www.gnu.org/licenses/>.
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*/
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2016-05-17 09:57:28 +00:00
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#include <pthread.h>
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2016-03-18 06:28:29 +00:00
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#include <libavcodec/avcodec.h>
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2017-06-08 19:16:11 +00:00
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#include "config.h"
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2016-03-18 06:28:29 +00:00
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#include "lavc.h"
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#include "common/common.h"
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#include "common/av_common.h"
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#include "video/fmt-conversion.h"
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#include "video/mp_image.h"
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2016-06-28 18:36:00 +00:00
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#include "video/mp_image_pool.h"
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2016-03-18 06:28:29 +00:00
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#include "osdep/windows_utils.h"
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#include "d3d.h"
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2017-06-08 19:16:11 +00:00
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#if !HAVE_D3D_HWACCEL_NEW
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2016-03-18 06:28:29 +00:00
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// define all the GUIDs used directly here, to avoid problems with inconsistent
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// dxva2api.h versions in mingw-w64 and different MSVC version
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2016-09-27 12:44:18 +00:00
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#include <guiddef.h>
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#include <cguid.h>
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2016-03-18 06:28:29 +00:00
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DEFINE_GUID(DXVA2_ModeMPEG2_VLD, 0xee27417f, 0x5e28, 0x4e65, 0xbe, 0xea, 0x1d, 0x26, 0xb5, 0x08, 0xad, 0xc9);
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DEFINE_GUID(DXVA2_ModeMPEG2and1_VLD, 0x86695f12, 0x340e, 0x4f04, 0x9f, 0xd3, 0x92, 0x53, 0xdd, 0x32, 0x74, 0x60);
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DEFINE_GUID(DXVA2_ModeH264_E, 0x1b81be68, 0xa0c7, 0x11d3, 0xb9, 0x84, 0x00, 0xc0, 0x4f, 0x2e, 0x73, 0xc5);
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DEFINE_GUID(DXVA2_ModeH264_F, 0x1b81be69, 0xa0c7, 0x11d3, 0xb9, 0x84, 0x00, 0xc0, 0x4f, 0x2e, 0x73, 0xc5);
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DEFINE_GUID(DXVA_ModeH264_VLD_WithFMOASO_NoFGT, 0xd5f04ff9, 0x3418, 0x45d8, 0x95, 0x61, 0x32, 0xa7, 0x6a, 0xae, 0x2d, 0xdd);
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DEFINE_GUID(DXVA_Intel_H264_NoFGT_ClearVideo, 0x604F8E68, 0x4951, 0x4c54, 0x88, 0xFE, 0xAB, 0xD2, 0x5C, 0x15, 0xB3, 0xD6);
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DEFINE_GUID(DXVA_ModeH264_VLD_NoFGT_Flash, 0x4245F676, 0x2BBC, 0x4166, 0xa0, 0xBB, 0x54, 0xE7, 0xB8, 0x49, 0xC3, 0x80);
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DEFINE_GUID(DXVA2_ModeVC1_D, 0x1b81beA3, 0xa0c7, 0x11d3, 0xb9, 0x84, 0x00, 0xc0, 0x4f, 0x2e, 0x73, 0xc5);
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DEFINE_GUID(DXVA2_ModeVC1_D2010, 0x1b81beA4, 0xa0c7, 0x11d3, 0xb9, 0x84, 0x00, 0xc0, 0x4f, 0x2e, 0x73, 0xc5); // August 2010 update
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DEFINE_GUID(DXVA2_ModeHEVC_VLD_Main, 0x5b11d51b, 0x2f4c, 0x4452, 0xbc, 0xc3, 0x09, 0xf2, 0xa1, 0x16, 0x0c, 0xc0);
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DEFINE_GUID(DXVA2_ModeHEVC_VLD_Main10, 0x107af0e0, 0xef1a, 0x4d19, 0xab, 0xa8, 0x67, 0xa1, 0x63, 0x07, 0x3d, 0x13);
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DEFINE_GUID(DXVA2_ModeVP9_VLD_Profile0, 0x463707f8, 0xa1d0, 0x4585, 0x87, 0x6d, 0x83, 0xaa, 0x6d, 0x60, 0xb8, 0x9e);
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DEFINE_GUID(DXVA2_NoEncrypt, 0x1b81beD0, 0xa0c7, 0x11d3, 0xb9, 0x84, 0x00, 0xc0, 0x4f, 0x2e, 0x73, 0xc5);
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static const int PROF_MPEG2_MAIN[] = {FF_PROFILE_MPEG2_SIMPLE,
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FF_PROFILE_MPEG2_MAIN, 0};
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static const int PROF_H264_HIGH[] = {FF_PROFILE_H264_CONSTRAINED_BASELINE,
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FF_PROFILE_H264_MAIN,
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FF_PROFILE_H264_HIGH, 0};
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static const int PROF_HEVC_MAIN[] = {FF_PROFILE_HEVC_MAIN, 0};
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static const int PROF_HEVC_MAIN10[] = {FF_PROFILE_HEVC_MAIN,
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FF_PROFILE_HEVC_MAIN_10, 0};
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struct d3dva_mode {
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const GUID *guid;
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const char *name;
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enum AVCodecID codec;
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const int *profiles; // NULL or ends with 0
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};
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#define MODE2(id) &MP_CONCAT(DXVA2_Mode, id), # id
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#define MODE(id) &MP_CONCAT(DXVA_, id), # id
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2016-06-25 18:07:38 +00:00
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// Preferred modes must come first
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2016-03-18 06:28:29 +00:00
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static const struct d3dva_mode d3dva_modes[] = {
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// MPEG-1/2
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2016-05-03 13:46:16 +00:00
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{MODE2(MPEG2_VLD), AV_CODEC_ID_MPEG2VIDEO, PROF_MPEG2_MAIN},
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2016-03-18 06:28:29 +00:00
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{MODE2(MPEG2and1_VLD), AV_CODEC_ID_MPEG2VIDEO, PROF_MPEG2_MAIN},
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{MODE2(MPEG2and1_VLD), AV_CODEC_ID_MPEG1VIDEO},
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// H.264
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{MODE2(H264_F), AV_CODEC_ID_H264, PROF_H264_HIGH},
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{MODE2(H264_E), AV_CODEC_ID_H264, PROF_H264_HIGH},
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2016-04-18 09:00:50 +00:00
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{MODE (Intel_H264_NoFGT_ClearVideo), AV_CODEC_ID_H264, PROF_H264_HIGH},
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2016-03-18 06:28:29 +00:00
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{MODE (ModeH264_VLD_WithFMOASO_NoFGT), AV_CODEC_ID_H264, PROF_H264_HIGH},
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{MODE (ModeH264_VLD_NoFGT_Flash), AV_CODEC_ID_H264, PROF_H264_HIGH},
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// VC-1 / WMV3
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{MODE2(VC1_D), AV_CODEC_ID_VC1},
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{MODE2(VC1_D), AV_CODEC_ID_WMV3},
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{MODE2(VC1_D2010), AV_CODEC_ID_VC1},
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{MODE2(VC1_D2010), AV_CODEC_ID_WMV3},
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// HEVC
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{MODE2(HEVC_VLD_Main), AV_CODEC_ID_HEVC, PROF_HEVC_MAIN},
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{MODE2(HEVC_VLD_Main10), AV_CODEC_ID_HEVC, PROF_HEVC_MAIN10},
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// VP9
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{MODE2(VP9_VLD_Profile0), AV_CODEC_ID_VP9},
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};
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#undef MODE
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#undef MODE2
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2017-06-08 19:16:11 +00:00
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#endif
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2016-05-17 09:57:28 +00:00
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HMODULE d3d11_dll, d3d9_dll, dxva2_dll;
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2017-06-30 10:46:12 +00:00
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PFN_D3D11_CREATE_DEVICE d3d11_D3D11CreateDevice;
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2016-05-17 09:57:28 +00:00
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static pthread_once_t d3d_load_once = PTHREAD_ONCE_INIT;
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2017-06-30 10:46:12 +00:00
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#if !HAVE_UWP
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2016-05-17 09:57:28 +00:00
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static void d3d_do_load(void)
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{
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d3d11_dll = LoadLibrary(L"d3d11.dll");
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d3d9_dll = LoadLibrary(L"d3d9.dll");
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dxva2_dll = LoadLibrary(L"dxva2.dll");
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2017-06-30 10:46:12 +00:00
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if (d3d11_dll) {
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d3d11_D3D11CreateDevice =
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(void *)GetProcAddress(d3d11_dll, "D3D11CreateDevice");
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}
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}
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#else
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static void d3d_do_load(void)
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{
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d3d11_D3D11CreateDevice = D3D11CreateDevice;
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2016-05-17 09:57:28 +00:00
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}
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2017-06-30 10:46:12 +00:00
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#endif
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2016-05-17 09:57:28 +00:00
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void d3d_load_dlls(void)
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{
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pthread_once(&d3d_load_once, d3d_do_load);
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}
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2017-06-08 19:16:11 +00:00
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// Test if Direct3D11 can be used by us. Basically, this prevents trying to use
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// D3D11 on Win7, and then failing somewhere in the process.
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bool d3d11_check_decoding(ID3D11Device *dev)
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{
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HRESULT hr;
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// We assume that NV12 is always supported, if hw decoding is supported at
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// all.
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UINT supported = 0;
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hr = ID3D11Device_CheckFormatSupport(dev, DXGI_FORMAT_NV12, &supported);
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return !FAILED(hr) && (supported & D3D11_BIND_DECODER);
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}
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#if !HAVE_D3D_HWACCEL_NEW
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2016-04-07 15:48:00 +00:00
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int d3d_probe_codec(const char *codec)
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2016-03-18 06:28:29 +00:00
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{
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2016-04-07 19:04:31 +00:00
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enum AVCodecID codecid = mp_codec_to_av_codec_id(codec);
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2016-03-18 06:28:29 +00:00
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for (int i = 0; i < MP_ARRAY_SIZE(d3dva_modes); i++) {
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const struct d3dva_mode *mode = &d3dva_modes[i];
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2016-04-07 19:04:31 +00:00
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if (mode->codec == codecid)
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2016-03-18 06:28:29 +00:00
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return 0;
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}
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return HWDEC_ERR_NO_CODEC;
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}
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static bool profile_compatible(const struct d3dva_mode *mode, int profile)
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{
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if (!mode->profiles)
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return true;
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for (int i = 0; mode->profiles[i]; i++){
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if(mode->profiles[i] == profile)
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return true;
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}
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return false;
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}
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static bool mode_supported(const struct d3dva_mode *mode,
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const GUID *device_modes, UINT n_modes)
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{
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for (int i = 0; i < n_modes; i++) {
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if (IsEqualGUID(mode->guid, &device_modes[i]))
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return true;
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}
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return false;
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}
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struct d3d_decoder_fmt d3d_select_decoder_mode(
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struct lavc_ctx *s, const GUID *device_guids, UINT n_guids,
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2016-04-29 21:13:24 +00:00
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const struct d3d_decoded_format *formats, int n_formats,
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bool (*test_fmt_cb)(struct lavc_ctx *s, const GUID *guid,
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const struct d3d_decoded_format *fmt))
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2016-03-18 06:28:29 +00:00
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{
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struct d3d_decoder_fmt fmt = {
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2016-04-29 21:28:15 +00:00
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.guid = &GUID_NULL,
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.format = NULL,
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2016-03-18 06:28:29 +00:00
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};
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// this has the right bit-depth, but is unfortunately not the native format
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int sw_img_fmt = pixfmt2imgfmt(s->avctx->sw_pix_fmt);
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if (sw_img_fmt == IMGFMT_NONE)
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return fmt;
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int depth = IMGFMT_RGB_DEPTH(sw_img_fmt);
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for (int i = 0; i < MP_ARRAY_SIZE(d3dva_modes); i++) {
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const struct d3dva_mode *mode = &d3dva_modes[i];
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if (mode->codec == s->avctx->codec_id &&
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profile_compatible(mode, s->avctx->profile) &&
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mode_supported(mode, device_guids, n_guids)) {
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2016-04-29 21:13:24 +00:00
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for (int n = 0; n < n_formats; n++) {
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const struct d3d_decoded_format *format = &formats[n];
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if (depth <= format->depth && test_fmt_cb(s, mode->guid, format))
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{
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MP_VERBOSE(s, "Selecting %s ",
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d3d_decoder_guid_to_desc(mode->guid));
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if (format->dxfmt >= (1 << 16)) {
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MP_VERBOSE(s, "%s\n", mp_tag_str(format->dxfmt));
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} else {
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MP_VERBOSE(s, "%d\n", (int)format->dxfmt);
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}
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2016-04-29 21:28:15 +00:00
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fmt.guid = mode->guid;
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fmt.format = format;
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2016-04-29 21:13:24 +00:00
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return fmt;
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}
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2016-03-18 06:28:29 +00:00
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}
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}
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}
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return fmt;
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}
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char *d3d_decoder_guid_to_desc_buf(char *buf, size_t buf_size,
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const GUID *mode_guid)
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{
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const char *name = "<unknown>";
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for (int i = 0; i < MP_ARRAY_SIZE(d3dva_modes); i++) {
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const struct d3dva_mode *mode = &d3dva_modes[i];
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if (IsEqualGUID(mode->guid, mode_guid)) {
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name = mode->name;
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break;
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}
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}
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snprintf(buf, buf_size, "%s %s", mp_GUID_to_str(mode_guid), name);
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return buf;
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}
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void d3d_surface_align(struct lavc_ctx *s, int *w, int *h)
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{
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int alignment = 16;
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switch (s->avctx->codec_id) {
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// decoding MPEG-2 requires additional alignment on some Intel GPUs, but it
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// causes issues for H.264 on certain AMD GPUs.....
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case AV_CODEC_ID_MPEG2VIDEO:
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alignment = 32;
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break;
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// the HEVC DXVA2 spec asks for 128 pixel aligned surfaces to ensure
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// all coding features have enough room to work with
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case AV_CODEC_ID_HEVC:
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alignment = 128;
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break;
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}
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*w = FFALIGN(*w, alignment);
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*h = FFALIGN(*h, alignment);
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}
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unsigned d3d_decoder_config_score(struct lavc_ctx *s,
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GUID *guidConfigBitstreamEncryption,
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UINT ConfigBitstreamRaw)
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{
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unsigned score = 0;
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if (ConfigBitstreamRaw == 1) {
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score = 1;
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} else if (s->avctx->codec_id == AV_CODEC_ID_H264
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&& ConfigBitstreamRaw == 2) {
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score = 2;
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} else {
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return 0;
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}
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if (IsEqualGUID(guidConfigBitstreamEncryption, &DXVA2_NoEncrypt))
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score += 16;
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return score;
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}
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BOOL is_clearvideo(const GUID *mode_guid)
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{
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|
return IsEqualGUID(mode_guid, &DXVA_Intel_H264_NoFGT_ClearVideo);
|
|
|
|
}
|
|
|
|
|
|
|
|
void copy_nv12(struct mp_image *dest, uint8_t *src_bits,
|
|
|
|
unsigned src_pitch, unsigned surf_height)
|
|
|
|
{
|
|
|
|
struct mp_image buf = {0};
|
|
|
|
mp_image_setfmt(&buf, dest->imgfmt);
|
|
|
|
mp_image_set_size(&buf, dest->w, dest->h);
|
|
|
|
|
|
|
|
buf.planes[0] = src_bits;
|
|
|
|
buf.stride[0] = src_pitch;
|
|
|
|
buf.planes[1] = src_bits + src_pitch * surf_height;
|
|
|
|
buf.stride[1] = src_pitch;
|
|
|
|
mp_image_copy_gpu(dest, &buf);
|
|
|
|
}
|
2016-06-28 18:04:16 +00:00
|
|
|
|
2016-06-28 18:36:00 +00:00
|
|
|
static int get_dxgi_mpfmt(DWORD dxgi_fmt)
|
|
|
|
{
|
|
|
|
switch (dxgi_fmt) {
|
|
|
|
case DXGI_FORMAT_NV12: return IMGFMT_NV12;
|
|
|
|
case DXGI_FORMAT_P010: return IMGFMT_P010;
|
|
|
|
case DXGI_FORMAT_P016: return IMGFMT_P010;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct mp_image *d3d11_download_image(struct mp_hwdec_ctx *ctx,
|
|
|
|
struct mp_image *mpi,
|
|
|
|
struct mp_image_pool *swpool)
|
|
|
|
{
|
|
|
|
HRESULT hr;
|
|
|
|
ID3D11Device *device = ctx->ctx;
|
|
|
|
|
|
|
|
if (mpi->imgfmt != IMGFMT_D3D11VA && mpi->imgfmt != IMGFMT_D3D11NV12)
|
|
|
|
return NULL;
|
|
|
|
|
2017-05-03 23:13:03 +00:00
|
|
|
ID3D11Texture2D *texture = (void *)mpi->planes[0];
|
|
|
|
int subindex = (intptr_t)mpi->planes[1];
|
2016-06-28 18:36:00 +00:00
|
|
|
if (!texture)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
D3D11_TEXTURE2D_DESC tex_desc;
|
|
|
|
ID3D11Texture2D_GetDesc(texture, &tex_desc);
|
|
|
|
int mpfmt = get_dxgi_mpfmt(tex_desc.Format);
|
|
|
|
if (!mpfmt)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
// create staging texture shared with the CPU with mostly the same
|
|
|
|
// parameters as the source texture
|
|
|
|
tex_desc.MipLevels = 1;
|
|
|
|
tex_desc.MiscFlags = 0;
|
|
|
|
tex_desc.ArraySize = 1;
|
|
|
|
tex_desc.Usage = D3D11_USAGE_STAGING;
|
|
|
|
tex_desc.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
|
|
|
|
tex_desc.BindFlags = 0;
|
|
|
|
ID3D11Texture2D *staging = NULL;
|
|
|
|
hr = ID3D11Device_CreateTexture2D(device, &tex_desc, NULL, &staging);
|
|
|
|
if (FAILED(hr))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
bool ok = false;
|
|
|
|
struct mp_image *sw_img = NULL;
|
|
|
|
ID3D11DeviceContext *device_ctx = NULL;
|
|
|
|
ID3D11Device_GetImmediateContext(device, &device_ctx);
|
|
|
|
|
|
|
|
// copy to the staging texture
|
|
|
|
ID3D11DeviceContext_CopySubresourceRegion(
|
|
|
|
device_ctx,
|
|
|
|
(ID3D11Resource *)staging, 0, 0, 0, 0,
|
|
|
|
(ID3D11Resource *)texture, subindex, NULL);
|
|
|
|
|
|
|
|
sw_img = mp_image_pool_get(swpool, mpfmt, tex_desc.Width, tex_desc.Height);
|
|
|
|
if (!sw_img)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
// copy staging texture to the cpu mp_image
|
|
|
|
D3D11_MAPPED_SUBRESOURCE lock;
|
|
|
|
hr = ID3D11DeviceContext_Map(device_ctx, (ID3D11Resource *)staging,
|
|
|
|
0, D3D11_MAP_READ, 0, &lock);
|
|
|
|
if (FAILED(hr))
|
|
|
|
goto done;
|
|
|
|
copy_nv12(sw_img, lock.pData, lock.RowPitch, tex_desc.Height);
|
|
|
|
ID3D11DeviceContext_Unmap(device_ctx, (ID3D11Resource *)staging, 0);
|
|
|
|
|
|
|
|
mp_image_set_size(sw_img, mpi->w, mpi->h);
|
|
|
|
mp_image_copy_attributes(sw_img, mpi);
|
|
|
|
ok = true;
|
|
|
|
|
|
|
|
done:
|
|
|
|
ID3D11Texture2D_Release(staging);
|
|
|
|
ID3D11DeviceContext_Release(device_ctx);
|
|
|
|
if (!ok)
|
|
|
|
mp_image_unrefp(&sw_img);
|
|
|
|
return sw_img;
|
|
|
|
}
|
2017-06-08 19:16:11 +00:00
|
|
|
|
|
|
|
// Dummies for simpler compat.
|
|
|
|
AVBufferRef *d3d11_wrap_device_ref(ID3D11Device *device) { return NULL; }
|
|
|
|
AVBufferRef *d3d9_wrap_device_ref(struct IDirect3DDevice9 *device) { return NULL; }
|
|
|
|
|
|
|
|
#else /* !HAVE_D3D_HWACCEL_NEW */
|
|
|
|
|
|
|
|
#include <libavutil/hwcontext.h>
|
|
|
|
#include <libavutil/hwcontext_d3d11va.h>
|
|
|
|
|
2017-06-30 10:27:15 +00:00
|
|
|
#if HAVE_D3D9_HWACCEL
|
|
|
|
#include <libavutil/hwcontext_dxva2.h>
|
|
|
|
#endif
|
|
|
|
|
2017-06-08 19:16:11 +00:00
|
|
|
void d3d_hwframes_refine(struct lavc_ctx *ctx, AVBufferRef *hw_frames_ctx)
|
|
|
|
{
|
|
|
|
AVHWFramesContext *fctx = (void *)hw_frames_ctx->data;
|
|
|
|
|
|
|
|
int alignment = 16;
|
|
|
|
switch (ctx->avctx->codec_id) {
|
|
|
|
// decoding MPEG-2 requires additional alignment on some Intel GPUs, but it
|
|
|
|
// causes issues for H.264 on certain AMD GPUs.....
|
|
|
|
case AV_CODEC_ID_MPEG2VIDEO:
|
|
|
|
alignment = 32;
|
|
|
|
break;
|
|
|
|
// the HEVC DXVA2 spec asks for 128 pixel aligned surfaces to ensure
|
|
|
|
// all coding features have enough room to work with
|
|
|
|
case AV_CODEC_ID_HEVC:
|
|
|
|
alignment = 128;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
fctx->width = FFALIGN(fctx->width, alignment);
|
|
|
|
fctx->height = FFALIGN(fctx->height, alignment);
|
|
|
|
|
2017-06-30 10:27:15 +00:00
|
|
|
#if HAVE_D3D9_HWACCEL
|
2017-06-08 19:16:11 +00:00
|
|
|
if (fctx->format == AV_PIX_FMT_DXVA2_VLD) {
|
|
|
|
AVDXVA2FramesContext *hwctx = fctx->hwctx;
|
|
|
|
|
|
|
|
hwctx->surface_type = DXVA2_VideoDecoderRenderTarget;
|
|
|
|
}
|
2017-06-30 10:27:15 +00:00
|
|
|
#endif
|
2017-06-08 19:16:11 +00:00
|
|
|
|
|
|
|
if (fctx->format == AV_PIX_FMT_D3D11) {
|
|
|
|
AVD3D11VAFramesContext *hwctx = fctx->hwctx;
|
|
|
|
|
|
|
|
hwctx->BindFlags |= D3D11_BIND_DECODER | D3D11_BIND_SHADER_RESOURCE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
AVBufferRef *d3d11_wrap_device_ref(ID3D11Device *device)
|
|
|
|
{
|
|
|
|
AVBufferRef *device_ref = av_hwdevice_ctx_alloc(AV_HWDEVICE_TYPE_D3D11VA);
|
|
|
|
if (!device_ref)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
AVHWDeviceContext *ctx = (void *)device_ref->data;
|
|
|
|
AVD3D11VADeviceContext *hwctx = ctx->hwctx;
|
|
|
|
|
|
|
|
ID3D11Device_AddRef(device);
|
|
|
|
hwctx->device = device;
|
|
|
|
|
|
|
|
if (av_hwdevice_ctx_init(device_ref) < 0)
|
|
|
|
av_buffer_unref(&device_ref);
|
|
|
|
|
|
|
|
return device_ref;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Dummy for simpler compat.
|
|
|
|
struct mp_image *d3d11_download_image(struct mp_hwdec_ctx *ctx,
|
|
|
|
struct mp_image *mpi,
|
|
|
|
struct mp_image_pool *swpool)
|
|
|
|
{
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* else !HAVE_D3D_HWACCEL_NEW */
|