mirror of https://git.ffmpeg.org/ffmpeg.git
324 lines
8.6 KiB
NASM
324 lines
8.6 KiB
NASM
;*****************************************************************************
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;* x86-optimized Float DSP functions
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;*
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;* Copyright 2006 Loren Merritt
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "x86util.asm"
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SECTION .text
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;-----------------------------------------------------------------------------
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; void vector_fmul(float *dst, const float *src0, const float *src1, int len)
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;-----------------------------------------------------------------------------
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%macro VECTOR_FMUL 0
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cglobal vector_fmul, 4,4,2, dst, src0, src1, len
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lea lenq, [lend*4 - 64]
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ALIGN 16
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.loop:
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%assign a 0
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%rep 32/mmsize
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mova m0, [src0q + lenq + (a+0)*mmsize]
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mova m1, [src0q + lenq + (a+1)*mmsize]
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mulps m0, m0, [src1q + lenq + (a+0)*mmsize]
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mulps m1, m1, [src1q + lenq + (a+1)*mmsize]
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mova [dstq + lenq + (a+0)*mmsize], m0
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mova [dstq + lenq + (a+1)*mmsize], m1
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%assign a a+2
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%endrep
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sub lenq, 64
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jge .loop
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REP_RET
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%endmacro
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INIT_XMM sse
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VECTOR_FMUL
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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VECTOR_FMUL
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%endif
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;------------------------------------------------------------------------------
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; void ff_vector_fmac_scalar(float *dst, const float *src, float mul, int len)
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;------------------------------------------------------------------------------
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%macro VECTOR_FMAC_SCALAR 0
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%if UNIX64
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cglobal vector_fmac_scalar, 3,3,5, dst, src, len
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%else
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cglobal vector_fmac_scalar, 4,4,5, dst, src, mul, len
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%endif
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%if ARCH_X86_32
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VBROADCASTSS m0, mulm
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%else
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%if WIN64
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SWAP 0, 2
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%endif
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shufps xm0, xm0, 0
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%if cpuflag(avx)
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vinsertf128 m0, m0, xm0, 1
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%endif
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%endif
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lea lenq, [lend*4-64]
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.loop:
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%if cpuflag(fma3)
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mova m1, [dstq+lenq]
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mova m2, [dstq+lenq+1*mmsize]
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fmaddps m1, m0, [srcq+lenq], m1
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fmaddps m2, m0, [srcq+lenq+1*mmsize], m2
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%else ; cpuflag
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mulps m1, m0, [srcq+lenq]
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mulps m2, m0, [srcq+lenq+1*mmsize]
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%if mmsize < 32
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mulps m3, m0, [srcq+lenq+2*mmsize]
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mulps m4, m0, [srcq+lenq+3*mmsize]
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%endif ; mmsize
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addps m1, m1, [dstq+lenq]
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addps m2, m2, [dstq+lenq+1*mmsize]
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%if mmsize < 32
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addps m3, m3, [dstq+lenq+2*mmsize]
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addps m4, m4, [dstq+lenq+3*mmsize]
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%endif ; mmsize
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%endif ; cpuflag
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mova [dstq+lenq], m1
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mova [dstq+lenq+1*mmsize], m2
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%if mmsize < 32
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mova [dstq+lenq+2*mmsize], m3
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mova [dstq+lenq+3*mmsize], m4
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%endif ; mmsize
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sub lenq, 64
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jge .loop
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REP_RET
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%endmacro
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INIT_XMM sse
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VECTOR_FMAC_SCALAR
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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VECTOR_FMAC_SCALAR
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%endif
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%if HAVE_FMA3_EXTERNAL
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INIT_YMM fma3
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VECTOR_FMAC_SCALAR
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%endif
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;------------------------------------------------------------------------------
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; void ff_vector_fmul_scalar(float *dst, const float *src, float mul, int len)
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;------------------------------------------------------------------------------
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%macro VECTOR_FMUL_SCALAR 0
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%if UNIX64
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cglobal vector_fmul_scalar, 3,3,2, dst, src, len
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%else
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cglobal vector_fmul_scalar, 4,4,3, dst, src, mul, len
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%endif
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%if ARCH_X86_32
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movss m0, mulm
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%elif WIN64
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SWAP 0, 2
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%endif
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shufps m0, m0, 0
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lea lenq, [lend*4-mmsize]
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.loop:
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mova m1, [srcq+lenq]
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mulps m1, m0
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mova [dstq+lenq], m1
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sub lenq, mmsize
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jge .loop
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REP_RET
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%endmacro
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INIT_XMM sse
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VECTOR_FMUL_SCALAR
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;------------------------------------------------------------------------------
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; void ff_vector_dmul_scalar(double *dst, const double *src, double mul,
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; int len)
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;------------------------------------------------------------------------------
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%macro VECTOR_DMUL_SCALAR 0
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%if ARCH_X86_32
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cglobal vector_dmul_scalar, 3,4,3, dst, src, mul, len, lenaddr
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mov lenq, lenaddrm
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%elif UNIX64
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cglobal vector_dmul_scalar, 3,3,3, dst, src, len
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%else
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cglobal vector_dmul_scalar, 4,4,3, dst, src, mul, len
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%endif
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%if ARCH_X86_32
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VBROADCASTSD m0, mulm
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%else
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%if WIN64
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SWAP 0, 2
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%endif
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movlhps xm0, xm0
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%if cpuflag(avx)
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vinsertf128 ym0, ym0, xm0, 1
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%endif
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%endif
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lea lenq, [lend*8-2*mmsize]
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.loop:
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mulpd m1, m0, [srcq+lenq ]
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mulpd m2, m0, [srcq+lenq+mmsize]
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mova [dstq+lenq ], m1
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mova [dstq+lenq+mmsize], m2
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sub lenq, 2*mmsize
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jge .loop
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REP_RET
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%endmacro
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INIT_XMM sse2
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VECTOR_DMUL_SCALAR
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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VECTOR_DMUL_SCALAR
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%endif
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;-----------------------------------------------------------------------------
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; vector_fmul_add(float *dst, const float *src0, const float *src1,
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; const float *src2, int len)
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;-----------------------------------------------------------------------------
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%macro VECTOR_FMUL_ADD 0
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cglobal vector_fmul_add, 5,5,4, dst, src0, src1, src2, len
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lea lenq, [lend*4 - 2*mmsize]
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ALIGN 16
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.loop:
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mova m0, [src0q + lenq]
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mova m1, [src0q + lenq + mmsize]
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%if cpuflag(fma3)
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mova m2, [src2q + lenq]
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mova m3, [src2q + lenq + mmsize]
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fmaddps m0, m0, [src1q + lenq], m2
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fmaddps m1, m1, [src1q + lenq + mmsize], m3
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%else
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mulps m0, m0, [src1q + lenq]
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mulps m1, m1, [src1q + lenq + mmsize]
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addps m0, m0, [src2q + lenq]
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addps m1, m1, [src2q + lenq + mmsize]
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%endif
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mova [dstq + lenq], m0
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mova [dstq + lenq + mmsize], m1
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sub lenq, 2*mmsize
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jge .loop
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REP_RET
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%endmacro
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INIT_XMM sse
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VECTOR_FMUL_ADD
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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VECTOR_FMUL_ADD
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%endif
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%if HAVE_FMA3_EXTERNAL
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INIT_YMM fma3
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VECTOR_FMUL_ADD
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%endif
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;-----------------------------------------------------------------------------
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; void vector_fmul_reverse(float *dst, const float *src0, const float *src1,
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; int len)
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;-----------------------------------------------------------------------------
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%macro VECTOR_FMUL_REVERSE 0
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cglobal vector_fmul_reverse, 4,4,2, dst, src0, src1, len
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lea lenq, [lend*4 - 2*mmsize]
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ALIGN 16
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.loop:
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%if cpuflag(avx)
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vmovaps xmm0, [src1q + 16]
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vinsertf128 m0, m0, [src1q], 1
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vshufps m0, m0, m0, q0123
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vmovaps xmm1, [src1q + mmsize + 16]
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vinsertf128 m1, m1, [src1q + mmsize], 1
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vshufps m1, m1, m1, q0123
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%else
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mova m0, [src1q]
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mova m1, [src1q + mmsize]
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shufps m0, m0, q0123
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shufps m1, m1, q0123
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%endif
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mulps m0, m0, [src0q + lenq + mmsize]
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mulps m1, m1, [src0q + lenq]
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mova [dstq + lenq + mmsize], m0
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mova [dstq + lenq], m1
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add src1q, 2*mmsize
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sub lenq, 2*mmsize
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jge .loop
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REP_RET
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%endmacro
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INIT_XMM sse
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VECTOR_FMUL_REVERSE
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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VECTOR_FMUL_REVERSE
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%endif
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; float scalarproduct_float_sse(const float *v1, const float *v2, int len)
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INIT_XMM sse
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cglobal scalarproduct_float, 3,3,2, v1, v2, offset
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neg offsetq
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shl offsetq, 2
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sub v1q, offsetq
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sub v2q, offsetq
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xorps xmm0, xmm0
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.loop:
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movaps xmm1, [v1q+offsetq]
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mulps xmm1, [v2q+offsetq]
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addps xmm0, xmm1
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add offsetq, 16
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js .loop
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movhlps xmm1, xmm0
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addps xmm0, xmm1
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movss xmm1, xmm0
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shufps xmm0, xmm0, 1
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addss xmm0, xmm1
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%if ARCH_X86_64 == 0
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movss r0m, xmm0
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fld dword r0m
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%endif
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RET
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;-----------------------------------------------------------------------------
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; void ff_butterflies_float(float *src0, float *src1, int len);
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;-----------------------------------------------------------------------------
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INIT_XMM sse
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cglobal butterflies_float, 3,3,3, src0, src1, len
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%if ARCH_X86_64
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movsxd lenq, lend
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%endif
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test lenq, lenq
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jz .end
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shl lenq, 2
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add src0q, lenq
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add src1q, lenq
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neg lenq
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.loop:
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mova m0, [src0q + lenq]
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mova m1, [src1q + lenq]
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subps m2, m0, m1
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addps m0, m0, m1
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mova [src1q + lenq], m2
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mova [src0q + lenq], m0
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add lenq, mmsize
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jl .loop
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.end:
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REP_RET
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