mirror of https://git.ffmpeg.org/ffmpeg.git
434 lines
13 KiB
ArmAsm
434 lines
13 KiB
ArmAsm
/*
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* Simple IDCT
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*
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* Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
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* Copyright (c) 2007 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "asm.S"
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#define W1 22725 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W2 21407 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W3 19266 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W4 16383 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W6 8867 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W7 4520 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define ROW_SHIFT 11
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#define COL_SHIFT 20
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#define W13 (W1 | (W3 << 16))
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#define W26 (W2 | (W6 << 16))
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#define W42 (W4 | (W2 << 16))
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#define W42n (-W4&0xffff | (-W2 << 16))
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#define W46 (W4 | (W6 << 16))
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#define W57 (W5 | (W7 << 16))
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.text
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.align
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w13: .long W13
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w26: .long W26
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w42: .long W42
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w42n: .long W42n
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w46: .long W46
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w57: .long W57
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/*
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Compute partial IDCT of single row.
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shift = left-shift amount
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a1 = source address
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a3 = row[2,0] <= 2 cycles
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a4 = row[3,1]
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ip = w42 <= 2 cycles
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Output in registers v1--v8
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*/
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.macro idct_row shift
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ldr lr, [pc, #(w46-.-8)] /* lr = W4 | (W6 << 16) */
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mov a2, #(1<<(\shift-1))
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smlad v1, a3, ip, a2
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smlsd v4, a3, ip, a2
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ldr ip, [pc, #(w13-.-8)] /* ip = W1 | (W3 << 16) */
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ldr v7, [pc, #(w57-.-8)] /* v7 = W5 | (W7 << 16) */
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smlad v2, a3, lr, a2
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smlsd v3, a3, lr, a2
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smuad v5, a4, ip /* v5 = B0 = W1*row[1] + W3*row[3] */
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smusdx fp, a4, v7 /* fp = B3 = W7*row[1] - W5*row[3] */
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ldr lr, [a1, #12] /* lr = row[7,5] */
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pkhtb a3, ip, v7, asr #16 /* a4 = W7 | (W3 << 16) */
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pkhbt a2, ip, v7, lsl #16 /* a2 = W1 | (W5 << 16) */
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smusdx v6, a3, a4 /* v6 = -B1 = W7*row[3] - W3*row[1] */
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smlad v5, lr, v7, v5 /* B0 += W5*row[5] + W7*row[7] */
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smusdx v7, a4, a2 /* v7 = B2 = W5*row[1] - W1*row[3] */
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ldr a4, [pc, #(w42n-.-8)] /* a4 = -W4 | (-W2 << 16) */
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smlad v7, lr, a3, v7 /* B2 += W7*row[5] + W3*row[7] */
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ldr a3, [a1, #4] /* a3 = row[6,4] */
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smlsdx fp, lr, ip, fp /* B3 += W3*row[5] - W1*row[7] */
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ldr ip, [pc, #(w46-.-8)] /* ip = W4 | (W6 << 16) */
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smlad v6, lr, a2, v6 /* B1 -= W1*row[5] + W5*row[7] */
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smlad v2, a3, a4, v2 /* A1 += -W4*row[4] - W2*row[6] */
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smlsd v3, a3, a4, v3 /* A2 += -W4*row[4] + W2*row[6] */
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smlad v1, a3, ip, v1 /* A0 += W4*row[4] + W6*row[6] */
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smlsd v4, a3, ip, v4 /* A3 += W4*row[4] - W6*row[6] */
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.endm
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/*
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Compute partial IDCT of half row.
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shift = left-shift amount
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a3 = row[2,0]
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a4 = row[3,1]
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ip = w42
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Output in registers v1--v8
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*/
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.macro idct_row4 shift
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ldr lr, [pc, #(w46-.-8)] /* lr = W4 | (W6 << 16) */
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ldr v7, [pc, #(w57-.-8)] /* v7 = W5 | (W7 << 16) */
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mov a2, #(1<<(\shift-1))
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smlad v1, a3, ip, a2
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smlsd v4, a3, ip, a2
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ldr ip, [pc, #(w13-.-8)] /* ip = W1 | (W3 << 16) */
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smlad v2, a3, lr, a2
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smlsd v3, a3, lr, a2
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smusdx fp, a4, v7 /* fp = B3 = W7*row[1] - W5*row[3] */
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smuad v5, a4, ip /* v5 = B0 = W1*row[1] + W3*row[3] */
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pkhtb a3, ip, v7, asr #16 /* a4 = W7 | (W3 << 16) */
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pkhbt a2, ip, v7, lsl #16 /* a2 = W1 | (W5 << 16) */
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smusdx v6, a3, a4 /* v6 = -B1 = W7*row[3] - W3*row[1] */
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smusdx v7, a4, a2 /* v7 = B2 = W5*row[1] - W1*row[3] */
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.endm
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/*
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Compute final part of IDCT single row without shift.
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Input in registers v1--v8
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Output in registers ip, v1--v3, lr, v5--v7
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*/
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.macro idct_finish
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add ip, v1, v5 /* a2 = A0 + B0 */
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sub lr, v1, v5 /* a3 = A0 - B0 */
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sub v1, v2, v6 /* a3 = A1 + B1 */
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add v5, v2, v6 /* a3 = A1 - B1 */
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add v2, v3, v7 /* a2 = A2 + B2 */
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sub v6, v3, v7 /* a2 = A2 - B2 */
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add v3, v4, fp /* a3 = A3 + B3 */
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sub v7, v4, fp /* a3 = A3 - B3 */
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.endm
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/*
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Compute final part of IDCT single row.
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shift = right-shift amount
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Input/output in registers v1--v8
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*/
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.macro idct_finish_shift shift
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add a4, v1, v5 /* a4 = A0 + B0 */
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sub a3, v1, v5 /* a3 = A0 - B0 */
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mov v1, a4, asr #\shift
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mov v5, a3, asr #\shift
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sub a4, v2, v6 /* a4 = A1 + B1 */
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add a3, v2, v6 /* a3 = A1 - B1 */
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mov v2, a4, asr #\shift
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mov v6, a3, asr #\shift
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add a4, v3, v7 /* a4 = A2 + B2 */
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sub a3, v3, v7 /* a3 = A2 - B2 */
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mov v3, a4, asr #\shift
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mov v7, a3, asr #\shift
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add a4, v4, fp /* a4 = A3 + B3 */
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sub a3, v4, fp /* a3 = A3 - B3 */
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mov v4, a4, asr #\shift
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mov fp, a3, asr #\shift
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.endm
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/*
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Compute final part of IDCT single row, saturating results at 8 bits.
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shift = right-shift amount
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Input/output in registers v1--v8
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*/
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.macro idct_finish_shift_sat shift
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add a4, v1, v5 /* a4 = A0 + B0 */
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sub ip, v1, v5 /* ip = A0 - B0 */
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usat v1, #8, a4, asr #\shift
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usat v5, #8, ip, asr #\shift
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sub a4, v2, v6 /* a4 = A1 + B1 */
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add ip, v2, v6 /* ip = A1 - B1 */
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usat v2, #8, a4, asr #\shift
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usat v6, #8, ip, asr #\shift
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add a4, v3, v7 /* a4 = A2 + B2 */
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sub ip, v3, v7 /* ip = A2 - B2 */
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usat v3, #8, a4, asr #\shift
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usat v7, #8, ip, asr #\shift
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add a4, v4, fp /* a4 = A3 + B3 */
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sub ip, v4, fp /* ip = A3 - B3 */
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usat v4, #8, a4, asr #\shift
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usat fp, #8, ip, asr #\shift
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.endm
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/*
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Compute IDCT of single row, storing as column.
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a1 = source
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a2 = dest
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*/
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function idct_row_armv6
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str lr, [sp, #-4]!
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ldr lr, [a1, #12] /* lr = row[7,5] */
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ldr ip, [a1, #4] /* ip = row[6,4] */
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ldr a4, [a1, #8] /* a4 = row[3,1] */
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ldr a3, [a1] /* a3 = row[2,0] */
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orrs lr, lr, ip
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cmpeq lr, a4
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cmpeq lr, a3, lsr #16
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beq 1f
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str a2, [sp, #-4]!
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ldr ip, [pc, #(w42-.-8)] /* ip = W4 | (W2 << 16) */
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cmp lr, #0
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beq 2f
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idct_row ROW_SHIFT
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b 3f
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2: idct_row4 ROW_SHIFT
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3: ldr a2, [sp], #4
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idct_finish_shift ROW_SHIFT
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strh v1, [a2]
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strh v2, [a2, #(16*2)]
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strh v3, [a2, #(16*4)]
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strh v4, [a2, #(16*6)]
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strh fp, [a2, #(16*1)]
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strh v7, [a2, #(16*3)]
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strh v6, [a2, #(16*5)]
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strh v5, [a2, #(16*7)]
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ldr pc, [sp], #4
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1: mov a3, a3, lsl #3
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strh a3, [a2]
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strh a3, [a2, #(16*2)]
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strh a3, [a2, #(16*4)]
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strh a3, [a2, #(16*6)]
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strh a3, [a2, #(16*1)]
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strh a3, [a2, #(16*3)]
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strh a3, [a2, #(16*5)]
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strh a3, [a2, #(16*7)]
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ldr pc, [sp], #4
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.endfunc
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/*
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Compute IDCT of single column, read as row.
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a1 = source
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a2 = dest
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*/
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function idct_col_armv6
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stmfd sp!, {a2, lr}
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ldr a3, [a1] /* a3 = row[2,0] */
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ldr ip, [pc, #(w42-.-8)] /* ip = W4 | (W2 << 16) */
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ldr a4, [a1, #8] /* a4 = row[3,1] */
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idct_row COL_SHIFT
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ldr a2, [sp], #4
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idct_finish_shift COL_SHIFT
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strh v1, [a2]
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strh v2, [a2, #(16*1)]
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strh v3, [a2, #(16*2)]
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strh v4, [a2, #(16*3)]
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strh fp, [a2, #(16*4)]
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strh v7, [a2, #(16*5)]
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strh v6, [a2, #(16*6)]
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strh v5, [a2, #(16*7)]
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ldr pc, [sp], #4
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.endfunc
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/*
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Compute IDCT of single column, read as row, store saturated 8-bit.
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a1 = source
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a2 = dest
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a3 = line size
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*/
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function idct_col_put_armv6
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stmfd sp!, {a2, a3, lr}
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ldr a3, [a1] /* a3 = row[2,0] */
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ldr ip, [pc, #(w42-.-8)] /* ip = W4 | (W2 << 16) */
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ldr a4, [a1, #8] /* a4 = row[3,1] */
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idct_row COL_SHIFT
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ldmfd sp!, {a2, a3}
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idct_finish_shift_sat COL_SHIFT
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strb v1, [a2], a3
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strb v2, [a2], a3
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strb v3, [a2], a3
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strb v4, [a2], a3
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strb fp, [a2], a3
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strb v7, [a2], a3
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strb v6, [a2], a3
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strb v5, [a2], a3
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sub a2, a2, a3, lsl #3
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ldr pc, [sp], #4
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.endfunc
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/*
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Compute IDCT of single column, read as row, add/store saturated 8-bit.
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a1 = source
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a2 = dest
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a3 = line size
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*/
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function idct_col_add_armv6
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stmfd sp!, {a2, a3, lr}
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ldr a3, [a1] /* a3 = row[2,0] */
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ldr ip, [pc, #(w42-.-8)] /* ip = W4 | (W2 << 16) */
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ldr a4, [a1, #8] /* a4 = row[3,1] */
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idct_row COL_SHIFT
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ldmfd sp!, {a2, a3}
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idct_finish
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ldrb a4, [a2]
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ldrb v4, [a2, a3]
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ldrb fp, [a2, a3, lsl #2]
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add ip, a4, ip, asr #COL_SHIFT
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usat ip, #8, ip
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add v1, v4, v1, asr #COL_SHIFT
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strb ip, [a2], a3
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ldrb ip, [a2, a3]
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usat v1, #8, v1
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ldrb fp, [a2, a3, lsl #2]
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add v2, ip, v2, asr #COL_SHIFT
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usat v2, #8, v2
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strb v1, [a2], a3
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ldrb a4, [a2, a3]
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ldrb ip, [a2, a3, lsl #2]
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strb v2, [a2], a3
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ldrb v4, [a2, a3]
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ldrb v1, [a2, a3, lsl #2]
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add v3, a4, v3, asr #COL_SHIFT
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usat v3, #8, v3
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add v7, v4, v7, asr #COL_SHIFT
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usat v7, #8, v7
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add v6, fp, v6, asr #COL_SHIFT
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usat v6, #8, v6
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add v5, ip, v5, asr #COL_SHIFT
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usat v5, #8, v5
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add lr, v1, lr, asr #COL_SHIFT
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usat lr, #8, lr
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strb v3, [a2], a3
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strb v7, [a2], a3
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strb v6, [a2], a3
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strb v5, [a2], a3
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strb lr, [a2], a3
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sub a2, a2, a3, lsl #3
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ldr pc, [sp], #4
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.endfunc
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/*
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Compute 8 IDCT row transforms.
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func = IDCT row->col function
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width = width of columns in bytes
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*/
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.macro idct_rows func width
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bl \func
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add a1, a1, #(16*2)
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add a2, a2, #\width
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bl \func
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add a1, a1, #(16*2)
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add a2, a2, #\width
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bl \func
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add a1, a1, #(16*2)
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add a2, a2, #\width
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bl \func
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sub a1, a1, #(16*5)
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add a2, a2, #\width
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bl \func
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add a1, a1, #(16*2)
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add a2, a2, #\width
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bl \func
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add a1, a1, #(16*2)
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add a2, a2, #\width
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bl \func
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add a1, a1, #(16*2)
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add a2, a2, #\width
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bl \func
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sub a1, a1, #(16*7)
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.endm
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/* void ff_simple_idct_armv6(DCTELEM *data); */
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function ff_simple_idct_armv6, export=1
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stmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, lr}
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sub sp, sp, #128
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mov a2, sp
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idct_rows idct_row_armv6, 2
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mov a2, a1
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mov a1, sp
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idct_rows idct_col_armv6, 2
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add sp, sp, #128
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ldmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, pc}
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.endfunc
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/* ff_simple_idct_add_armv6(uint8_t *dest, int line_size, DCTELEM *data); */
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function ff_simple_idct_add_armv6, export=1
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stmfd sp!, {a1, a2, v1, v2, v3, v4, v5, v6, v7, fp, lr}
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sub sp, sp, #128
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mov a1, a3
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mov a2, sp
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idct_rows idct_row_armv6, 2
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mov a1, sp
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ldr a2, [sp, #128]
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ldr a3, [sp, #(128+4)]
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idct_rows idct_col_add_armv6, 1
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add sp, sp, #(128+8)
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ldmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, pc}
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.endfunc
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/* ff_simple_idct_put_armv6(uint8_t *dest, int line_size, DCTELEM *data); */
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function ff_simple_idct_put_armv6, export=1
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stmfd sp!, {a1, a2, v1, v2, v3, v4, v5, v6, v7, fp, lr}
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sub sp, sp, #128
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mov a1, a3
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mov a2, sp
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idct_rows idct_row_armv6, 2
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mov a1, sp
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ldr a2, [sp, #128]
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ldr a3, [sp, #(128+4)]
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idct_rows idct_col_put_armv6, 1
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|
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add sp, sp, #(128+8)
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ldmfd sp!, {v1, v2, v3, v4, v5, v6, v7, fp, pc}
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.endfunc
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