mirror of https://git.ffmpeg.org/ffmpeg.git
424 lines
9.8 KiB
NASM
424 lines
9.8 KiB
NASM
;******************************************************************************
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;* MMX optimized DSP utils
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;* Copyright (c) 2008 Loren Merritt
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* 51, Inc., Foundation Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "x86inc.asm"
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SECTION_RODATA
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pb_f: times 16 db 15
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pb_zzzzzzzz77777777: times 8 db -1
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pb_7: times 8 db 7
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pb_zzzz3333zzzzbbbb: db -1,-1,-1,-1,3,3,3,3,-1,-1,-1,-1,11,11,11,11
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pb_zz11zz55zz99zzdd: db -1,-1,1,1,-1,-1,5,5,-1,-1,9,9,-1,-1,13,13
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section .text align=16
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%macro PSWAPD_SSE 2
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pshufw %1, %2, 0x4e
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%endmacro
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%macro PSWAPD_3DN1 2
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movq %1, %2
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psrlq %1, 32
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punpckldq %1, %2
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%endmacro
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%macro FLOAT_TO_INT16_INTERLEAVE6 1
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; void ff_float_to_int16_interleave6_sse(int16_t *dst, const float **src, int len)
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cglobal float_to_int16_interleave6_%1, 2,7,0, dst, src, src1, src2, src3, src4, src5
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%ifdef ARCH_X86_64
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%define lend r10d
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mov lend, r2d
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%else
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%define lend dword r2m
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%endif
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mov src1q, [srcq+1*gprsize]
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mov src2q, [srcq+2*gprsize]
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mov src3q, [srcq+3*gprsize]
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mov src4q, [srcq+4*gprsize]
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mov src5q, [srcq+5*gprsize]
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mov srcq, [srcq]
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sub src1q, srcq
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sub src2q, srcq
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sub src3q, srcq
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sub src4q, srcq
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sub src5q, srcq
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.loop:
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cvtps2pi mm0, [srcq]
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cvtps2pi mm1, [srcq+src1q]
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cvtps2pi mm2, [srcq+src2q]
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cvtps2pi mm3, [srcq+src3q]
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cvtps2pi mm4, [srcq+src4q]
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cvtps2pi mm5, [srcq+src5q]
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packssdw mm0, mm3
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packssdw mm1, mm4
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packssdw mm2, mm5
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pswapd mm3, mm0
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punpcklwd mm0, mm1
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punpckhwd mm1, mm2
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punpcklwd mm2, mm3
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pswapd mm3, mm0
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punpckldq mm0, mm2
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punpckhdq mm2, mm1
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punpckldq mm1, mm3
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movq [dstq ], mm0
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movq [dstq+16], mm2
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movq [dstq+ 8], mm1
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add srcq, 8
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add dstq, 24
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sub lend, 2
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jg .loop
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emms
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RET
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%endmacro ; FLOAT_TO_INT16_INTERLEAVE6
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%define pswapd PSWAPD_SSE
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FLOAT_TO_INT16_INTERLEAVE6 sse
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%define cvtps2pi pf2id
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%define pswapd PSWAPD_3DN1
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FLOAT_TO_INT16_INTERLEAVE6 3dnow
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%undef pswapd
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FLOAT_TO_INT16_INTERLEAVE6 3dn2
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%undef cvtps2pi
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%macro SCALARPRODUCT 1
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; int scalarproduct_int16(int16_t *v1, int16_t *v2, int order, int shift)
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cglobal scalarproduct_int16_%1, 3,3,4, v1, v2, order, shift
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shl orderq, 1
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add v1q, orderq
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add v2q, orderq
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neg orderq
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movd m3, shiftm
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pxor m2, m2
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.loop:
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movu m0, [v1q + orderq]
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movu m1, [v1q + orderq + mmsize]
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pmaddwd m0, [v2q + orderq]
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pmaddwd m1, [v2q + orderq + mmsize]
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paddd m2, m0
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paddd m2, m1
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add orderq, mmsize*2
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jl .loop
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%if mmsize == 16
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movhlps m0, m2
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paddd m2, m0
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psrad m2, m3
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pshuflw m0, m2, 0x4e
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%else
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psrad m2, m3
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pshufw m0, m2, 0x4e
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%endif
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paddd m2, m0
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movd eax, m2
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RET
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; int scalarproduct_and_madd_int16(int16_t *v1, int16_t *v2, int16_t *v3, int order, int mul)
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cglobal scalarproduct_and_madd_int16_%1, 4,4,8, v1, v2, v3, order, mul
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shl orderq, 1
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movd m7, mulm
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%if mmsize == 16
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pshuflw m7, m7, 0
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punpcklqdq m7, m7
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%else
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pshufw m7, m7, 0
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%endif
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pxor m6, m6
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add v1q, orderq
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add v2q, orderq
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add v3q, orderq
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neg orderq
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.loop:
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movu m0, [v2q + orderq]
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movu m1, [v2q + orderq + mmsize]
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mova m4, [v1q + orderq]
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mova m5, [v1q + orderq + mmsize]
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movu m2, [v3q + orderq]
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movu m3, [v3q + orderq + mmsize]
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pmaddwd m0, m4
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pmaddwd m1, m5
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pmullw m2, m7
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pmullw m3, m7
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paddd m6, m0
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paddd m6, m1
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paddw m2, m4
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paddw m3, m5
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mova [v1q + orderq], m2
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mova [v1q + orderq + mmsize], m3
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add orderq, mmsize*2
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jl .loop
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%if mmsize == 16
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movhlps m0, m6
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paddd m6, m0
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pshuflw m0, m6, 0x4e
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%else
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pshufw m0, m6, 0x4e
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%endif
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paddd m6, m0
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movd eax, m6
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RET
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%endmacro
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INIT_MMX
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SCALARPRODUCT mmx2
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INIT_XMM
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SCALARPRODUCT sse2
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%macro SCALARPRODUCT_LOOP 1
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align 16
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.loop%1:
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sub orderq, mmsize*2
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%if %1
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mova m1, m4
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mova m4, [v2q + orderq]
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mova m0, [v2q + orderq + mmsize]
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palignr m1, m0, %1
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palignr m0, m4, %1
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mova m3, m5
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mova m5, [v3q + orderq]
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mova m2, [v3q + orderq + mmsize]
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palignr m3, m2, %1
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palignr m2, m5, %1
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%else
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mova m0, [v2q + orderq]
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mova m1, [v2q + orderq + mmsize]
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mova m2, [v3q + orderq]
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mova m3, [v3q + orderq + mmsize]
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%endif
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%define t0 [v1q + orderq]
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%define t1 [v1q + orderq + mmsize]
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%ifdef ARCH_X86_64
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mova m8, t0
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mova m9, t1
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%define t0 m8
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%define t1 m9
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%endif
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pmaddwd m0, t0
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pmaddwd m1, t1
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pmullw m2, m7
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pmullw m3, m7
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paddw m2, t0
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paddw m3, t1
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paddd m6, m0
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paddd m6, m1
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mova [v1q + orderq], m2
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mova [v1q + orderq + mmsize], m3
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jg .loop%1
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%if %1
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jmp .end
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%endif
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%endmacro
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; int scalarproduct_and_madd_int16(int16_t *v1, int16_t *v2, int16_t *v3, int order, int mul)
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cglobal scalarproduct_and_madd_int16_ssse3, 4,5,10, v1, v2, v3, order, mul
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shl orderq, 1
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movd m7, mulm
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pshuflw m7, m7, 0
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punpcklqdq m7, m7
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pxor m6, m6
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mov r4d, v2d
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and r4d, 15
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and v2q, ~15
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and v3q, ~15
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mova m4, [v2q + orderq]
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mova m5, [v3q + orderq]
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; linear is faster than branch tree or jump table, because the branches taken are cyclic (i.e. predictable)
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cmp r4d, 0
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je .loop0
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cmp r4d, 2
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je .loop2
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cmp r4d, 4
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je .loop4
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cmp r4d, 6
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je .loop6
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cmp r4d, 8
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je .loop8
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cmp r4d, 10
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je .loop10
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cmp r4d, 12
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je .loop12
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SCALARPRODUCT_LOOP 14
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SCALARPRODUCT_LOOP 12
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SCALARPRODUCT_LOOP 10
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SCALARPRODUCT_LOOP 8
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SCALARPRODUCT_LOOP 6
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SCALARPRODUCT_LOOP 4
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SCALARPRODUCT_LOOP 2
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SCALARPRODUCT_LOOP 0
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.end:
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movhlps m0, m6
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paddd m6, m0
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pshuflw m0, m6, 0x4e
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paddd m6, m0
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movd eax, m6
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RET
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; void ff_add_hfyu_median_prediction_mmx2(uint8_t *dst, const uint8_t *top, const uint8_t *diff, int w, int *left, int *left_top)
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cglobal add_hfyu_median_prediction_mmx2, 6,6,0, dst, top, diff, w, left, left_top
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movq mm0, [topq]
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movq mm2, mm0
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movd mm4, [left_topq]
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psllq mm2, 8
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movq mm1, mm0
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por mm4, mm2
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movd mm3, [leftq]
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psubb mm0, mm4 ; t-tl
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add dstq, wq
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add topq, wq
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add diffq, wq
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neg wq
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jmp .skip
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.loop:
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movq mm4, [topq+wq]
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movq mm0, mm4
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psllq mm4, 8
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por mm4, mm1
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movq mm1, mm0 ; t
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psubb mm0, mm4 ; t-tl
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.skip:
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movq mm2, [diffq+wq]
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%assign i 0
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%rep 8
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movq mm4, mm0
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paddb mm4, mm3 ; t-tl+l
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movq mm5, mm3
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pmaxub mm3, mm1
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pminub mm5, mm1
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pminub mm3, mm4
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pmaxub mm3, mm5 ; median
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paddb mm3, mm2 ; +residual
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%if i==0
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movq mm7, mm3
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psllq mm7, 56
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%else
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movq mm6, mm3
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psrlq mm7, 8
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psllq mm6, 56
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por mm7, mm6
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%endif
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%if i<7
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psrlq mm0, 8
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psrlq mm1, 8
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psrlq mm2, 8
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%endif
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%assign i i+1
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%endrep
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movq [dstq+wq], mm7
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add wq, 8
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jl .loop
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movzx r2d, byte [dstq-1]
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mov [leftq], r2d
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movzx r2d, byte [topq-1]
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mov [left_topq], r2d
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RET
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%macro ADD_HFYU_LEFT_LOOP 1 ; %1 = is_aligned
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add srcq, wq
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add dstq, wq
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neg wq
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%%.loop:
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mova m1, [srcq+wq]
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mova m2, m1
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psllw m1, 8
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paddb m1, m2
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mova m2, m1
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pshufb m1, m3
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paddb m1, m2
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pshufb m0, m5
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mova m2, m1
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pshufb m1, m4
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paddb m1, m2
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%if mmsize == 16
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mova m2, m1
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pshufb m1, m6
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paddb m1, m2
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%endif
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paddb m0, m1
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%if %1
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mova [dstq+wq], m0
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%else
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movq [dstq+wq], m0
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movhps [dstq+wq+8], m0
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%endif
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add wq, mmsize
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jl %%.loop
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mov eax, mmsize-1
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sub eax, wd
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movd m1, eax
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pshufb m0, m1
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movd eax, m0
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RET
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%endmacro
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; int ff_add_hfyu_left_prediction(uint8_t *dst, const uint8_t *src, int w, int left)
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INIT_MMX
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cglobal add_hfyu_left_prediction_ssse3, 3,3,7, dst, src, w, left
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.skip_prologue:
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mova m5, [pb_7 GLOBAL]
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mova m4, [pb_zzzz3333zzzzbbbb GLOBAL]
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mova m3, [pb_zz11zz55zz99zzdd GLOBAL]
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movd m0, leftm
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psllq m0, 56
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ADD_HFYU_LEFT_LOOP 1
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INIT_XMM
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cglobal add_hfyu_left_prediction_sse4, 3,3,7, dst, src, w, left
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mova m5, [pb_f GLOBAL]
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mova m6, [pb_zzzzzzzz77777777 GLOBAL]
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mova m4, [pb_zzzz3333zzzzbbbb GLOBAL]
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mova m3, [pb_zz11zz55zz99zzdd GLOBAL]
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movd m0, leftm
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pslldq m0, 15
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test srcq, 15
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jnz add_hfyu_left_prediction_ssse3.skip_prologue
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test dstq, 15
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jnz .unaligned
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ADD_HFYU_LEFT_LOOP 1
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.unaligned:
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ADD_HFYU_LEFT_LOOP 0
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; float ff_scalarproduct_float_sse(const float *v1, const float *v2, int len)
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cglobal scalarproduct_float_sse, 3,3,2, v1, v2, offset
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neg offsetq
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shl offsetq, 2
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sub v1q, offsetq
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sub v2q, offsetq
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xorps xmm0, xmm0
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.loop:
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movaps xmm1, [v1q+offsetq]
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mulps xmm1, [v2q+offsetq]
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addps xmm0, xmm1
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add offsetq, 16
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js .loop
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movhlps xmm1, xmm0
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addps xmm0, xmm1
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movss xmm1, xmm0
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shufps xmm0, xmm0, 1
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addss xmm0, xmm1
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%ifndef ARCH_X86_64
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movd r0m, xmm0
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fld dword r0m
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%endif
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RET
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