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8 Commits

Author SHA1 Message Date
Lynne bbe95f7353
x86: replace explicit REP_RETs with RETs 
From x86inc:
> On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either
> a branch or a branch target. So switch to a 2-byte form of ret in that case.
> We can automatically detect "follows a branch", but not a branch target.
> (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.)

x86inc can automatically determine whether to use REP_RET rather than
REP in most of these cases, so impact is minimal. Additionally, a few
REP_RETs were used unnecessary, despite the return being nowhere near a
branch.

The only CPUs affected were AMD K10s, made between 2007 and 2011, 16
years ago and 12 years ago, respectively.

In the future, everyone involved with x86inc should consider dropping
REP_RETs altogether.
 2023-02-01 04:23:55 +01:00
Andreas Rheinhardt 8bec225c3c swscale/x86/yuv2yuvX: Remove unused ff_yuv2yuvX_mmx() 
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
 2022-08-19 12:01:34 +02:00
Alan Kelly 3ce8d09244 libswscale/x86/yuv2yuvX: Removes unrolling for mmx and mmxext 
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
 2021-04-01 20:47:52 +02:00
James Almer 1a555d3c60 swscale/x86/yuv2yuvX: use the movsxdifnidn helper macro 
Simplifies code

Signed-off-by: James Almer <jamrial@gmail.com>
 2021-02-18 18:47:43 -03:00
James Almer ebb48d85a0 swscale/x86/yuv2yuvX: use movq to load 8 bytes in all non-AVX2 functions 
mova expands to movq on non-XMM functions

Signed-off-by: James Almer <jamrial@gmail.com>
 2021-02-18 18:47:43 -03:00
James Almer d512ebbaed swscale/x86/yuv2yuvX: use the SPLATW helper macro 
Simplifies code

Signed-off-by: James Almer <jamrial@gmail.com>
 2021-02-18 18:47:43 -03:00
James Almer c2bf1dcace swscale/x86/swscale: fix compilation with old yasm 
Where AVX2 may not be supported.

Signed-off-by: James Almer <jamrial@gmail.com>
 2021-02-17 21:09:36 -03:00
Alan Kelly 554c2bc708 swscale: move yuv2yuvX_sse3 to yasm, unrolls main loop 
And other small optimizations for ~20% speedup.
 2021-02-17 21:21:03 +01:00