From de23b384fd7c098132ba1745342cb0d3ed1a7af6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Storsj=C3=B6?= Date: Wed, 20 Mar 2024 11:16:36 +0200 Subject: [PATCH] aarch64: hevc: Produce epel_bi_hv functions for both neon and i8mm MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In addition to just templating, this contains one change to ff_hevc_put_hevc_epel_bi_hv32_8, by setting the w6 register which ff_hevc_put_hevc_epel_h32_8_neon requires. AWS Graviton 3: put_hevc_epel_bi_hv4_8_c: 176.5 put_hevc_epel_bi_hv4_8_neon: 62.0 put_hevc_epel_bi_hv4_8_i8mm: 58.0 put_hevc_epel_bi_hv6_8_c: 343.7 put_hevc_epel_bi_hv6_8_neon: 109.7 put_hevc_epel_bi_hv6_8_i8mm: 105.7 put_hevc_epel_bi_hv8_8_c: 536.0 put_hevc_epel_bi_hv8_8_neon: 112.7 put_hevc_epel_bi_hv8_8_i8mm: 111.7 put_hevc_epel_bi_hv12_8_c: 1107.7 put_hevc_epel_bi_hv12_8_neon: 254.7 put_hevc_epel_bi_hv12_8_i8mm: 239.0 put_hevc_epel_bi_hv16_8_c: 1927.7 put_hevc_epel_bi_hv16_8_neon: 356.2 put_hevc_epel_bi_hv16_8_i8mm: 334.2 put_hevc_epel_bi_hv24_8_c: 4195.2 put_hevc_epel_bi_hv24_8_neon: 736.7 put_hevc_epel_bi_hv24_8_i8mm: 715.5 put_hevc_epel_bi_hv32_8_c: 7280.5 put_hevc_epel_bi_hv32_8_neon: 1287.7 put_hevc_epel_bi_hv32_8_i8mm: 1162.2 put_hevc_epel_bi_hv48_8_c: 16857.7 put_hevc_epel_bi_hv48_8_neon: 2836.2 put_hevc_epel_bi_hv48_8_i8mm: 2908.5 put_hevc_epel_bi_hv64_8_c: 29248.2 put_hevc_epel_bi_hv64_8_neon: 5051.7 put_hevc_epel_bi_hv64_8_i8mm: 4491.5 Signed-off-by: Martin Storsjö --- libavcodec/aarch64/hevcdsp_epel_neon.S | 62 +++++++++++------------ libavcodec/aarch64/hevcdsp_init_aarch64.c | 5 ++ 2 files changed, 36 insertions(+), 31 deletions(-) diff --git a/libavcodec/aarch64/hevcdsp_epel_neon.S b/libavcodec/aarch64/hevcdsp_epel_neon.S index 4d37cab572..378b0f7fb2 100644 --- a/libavcodec/aarch64/hevcdsp_epel_neon.S +++ b/libavcodec/aarch64/hevcdsp_epel_neon.S @@ -3792,14 +3792,6 @@ endfunc epel_uni_w_hv neon -#if HAVE_I8MM -ENABLE_I8MM - -epel_uni_w_hv neon_i8mm - -DISABLE_I8MM -#endif - function hevc_put_hevc_epel_bi_hv4_8_end_neon load_epel_filterh x7, x6 @@ -3979,10 +3971,8 @@ function hevc_put_hevc_epel_bi_hv32_8_end_neon ret endfunc -#if HAVE_I8MM -ENABLE_I8MM - -function ff_hevc_put_hevc_epel_bi_hv4_8_neon_i8mm, export=1 +.macro epel_bi_hv suffix +function ff_hevc_put_hevc_epel_bi_hv4_8_\suffix, export=1 add w10, w5, #3 lsl x10, x10, #7 sub sp, sp, x10 // tmp_array @@ -3995,14 +3985,14 @@ function ff_hevc_put_hevc_epel_bi_hv4_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h4_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_h4_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv4_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv6_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv6_8_\suffix, export=1 add w10, w5, #3 lsl x10, x10, #7 sub sp, sp, x10 // tmp_array @@ -4015,14 +4005,14 @@ function ff_hevc_put_hevc_epel_bi_hv6_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h6_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_h6_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv6_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv8_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv8_8_\suffix, export=1 add w10, w5, #3 lsl x10, x10, #7 sub sp, sp, x10 // tmp_array @@ -4035,14 +4025,14 @@ function ff_hevc_put_hevc_epel_bi_hv8_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h8_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_h8_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv8_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv12_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv12_8_\suffix, export=1 add w10, w5, #3 lsl x10, x10, #7 sub sp, sp, x10 // tmp_array @@ -4055,14 +4045,14 @@ function ff_hevc_put_hevc_epel_bi_hv12_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h12_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_h12_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv12_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv16_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv16_8_\suffix, export=1 add w10, w5, #3 lsl x10, x10, #7 sub sp, sp, x10 // tmp_array @@ -4075,14 +4065,14 @@ function ff_hevc_put_hevc_epel_bi_hv16_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h16_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_h16_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv16_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv24_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv24_8_\suffix, export=1 add w10, w5, #3 lsl x10, x10, #7 sub sp, sp, x10 // tmp_array @@ -4095,14 +4085,14 @@ function ff_hevc_put_hevc_epel_bi_hv24_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h24_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_h24_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv24_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv32_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv32_8_\suffix, export=1 str d8, [sp, #-16]! add w10, w5, #3 lsl x10, x10, #7 @@ -4116,20 +4106,21 @@ function ff_hevc_put_hevc_epel_bi_hv32_8_neon_i8mm, export=1 add w3, w5, #3 mov x4, x6 mov x5, x7 - bl X(ff_hevc_put_hevc_epel_h32_8_neon_i8mm) + mov w6, #32 + bl X(ff_hevc_put_hevc_epel_h32_8_\suffix) ldp x4, x5, [sp, #16] ldp x0, x1, [sp, #32] ldp x7, x30, [sp], #48 b hevc_put_hevc_epel_bi_hv32_8_end_neon endfunc -function ff_hevc_put_hevc_epel_bi_hv48_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv48_8_\suffix, export=1 stp x6, x7, [sp, #-80]! stp x4, x5, [sp, #16] stp x2, x3, [sp, #32] stp x0, x1, [sp, #48] str x30, [sp, #64] - bl X(ff_hevc_put_hevc_epel_bi_hv24_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_bi_hv24_8_\suffix) ldp x4, x5, [sp, #16] ldp x2, x3, [sp, #32] ldp x0, x1, [sp, #48] @@ -4137,18 +4128,18 @@ function ff_hevc_put_hevc_epel_bi_hv48_8_neon_i8mm, export=1 add x0, x0, #24 add x2, x2, #24 add x4, x4, #48 - bl X(ff_hevc_put_hevc_epel_bi_hv24_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_bi_hv24_8_\suffix) ldr x30, [sp], #16 ret endfunc -function ff_hevc_put_hevc_epel_bi_hv64_8_neon_i8mm, export=1 +function ff_hevc_put_hevc_epel_bi_hv64_8_\suffix, export=1 stp x6, x7, [sp, #-80]! stp x4, x5, [sp, #16] stp x2, x3, [sp, #32] stp x0, x1, [sp, #48] str x30, [sp, #64] - bl X(ff_hevc_put_hevc_epel_bi_hv32_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_bi_hv32_8_\suffix) ldp x4, x5, [sp, #16] ldp x2, x3, [sp, #32] ldp x0, x1, [sp, #48] @@ -4156,10 +4147,19 @@ function ff_hevc_put_hevc_epel_bi_hv64_8_neon_i8mm, export=1 add x0, x0, #32 add x2, x2, #32 add x4, x4, #64 - bl X(ff_hevc_put_hevc_epel_bi_hv32_8_neon_i8mm) + bl X(ff_hevc_put_hevc_epel_bi_hv32_8_\suffix) ldr x30, [sp], #16 ret endfunc +.endm + +epel_bi_hv neon + +#if HAVE_I8MM +ENABLE_I8MM + +epel_uni_w_hv neon_i8mm +epel_bi_hv neon_i8mm DISABLE_I8MM #endif diff --git a/libavcodec/aarch64/hevcdsp_init_aarch64.c b/libavcodec/aarch64/hevcdsp_init_aarch64.c index 948103aa09..6110a360d8 100644 --- a/libavcodec/aarch64/hevcdsp_init_aarch64.c +++ b/libavcodec/aarch64/hevcdsp_init_aarch64.c @@ -188,6 +188,10 @@ NEON8_FNPROTO(epel_bi_v, (uint8_t *dst, ptrdiff_t dststride, const uint8_t *src, ptrdiff_t srcstride, const int16_t *src2, int height, intptr_t mx, intptr_t my, int width),); +NEON8_FNPROTO(epel_bi_hv, (uint8_t *dst, ptrdiff_t dststride, + const uint8_t *src, ptrdiff_t srcstride, const int16_t *src2, + int height, intptr_t mx, intptr_t my, int width),); + NEON8_FNPROTO(epel_bi_hv, (uint8_t *dst, ptrdiff_t dststride, const uint8_t *src, ptrdiff_t srcstride, const int16_t *src2, int height, intptr_t mx, intptr_t my, int width), _i8mm); @@ -423,6 +427,7 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth) NEON8_FNASSIGN(c->put_hevc_epel, 1, 1, epel_hv,); NEON8_FNASSIGN(c->put_hevc_epel_uni, 1, 1, epel_uni_hv,); NEON8_FNASSIGN(c->put_hevc_epel_uni_w, 1, 1, epel_uni_w_hv,); + NEON8_FNASSIGN(c->put_hevc_epel_bi, 1, 1, epel_bi_hv,); if (have_i8mm(cpu_flags)) { NEON8_FNASSIGN(c->put_hevc_epel, 0, 1, epel_h, _i8mm);