mirror of https://git.ffmpeg.org/ffmpeg.git
ps2 idct patch by (Leon van Stuivenberg <leonvs at iae dot nl>)
Originally committed as revision 963 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Leon van Stuivenberg
Michael Niedermayer
parent
18a7b2a873
commit
d46aba2642
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@ -27,6 +27,7 @@ strip="strip"
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cpu=`uname -m`
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mmx="default"
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altivec="default"
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mmi="default"
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case "$cpu" in
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i386|i486|i586|i686|i86pc|BePC)
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cpu="x86"
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@ -40,6 +41,9 @@ case "$cpu" in
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"Power Macintosh"|ppc)
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cpu="powerpc"
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;;
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mips)
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cpu="mips"
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;;
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*)
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cpu="unknown"
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;;
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@ -226,6 +230,26 @@ EOF
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$cc -o $TMPO $TMPC -faltivec 2> /dev/null || altivec="no"
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fi
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# Can only do mmi on mips
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if test $mmi = "default"; then
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if test $cpu = "mips"; then
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mmi="yes"
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else
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mmi="no"
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fi
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fi
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# See does our compiler support mmi
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if test $mmi = "yes"; then
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cat > $TMPC << EOF
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int main(void) {
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__asm__ ("lq \$2, 0(\$2)");
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return 0;
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}
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EOF
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$cc -o $TMPO $TMPC 2> /dev/null || mmi="no"
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fi
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# Checking for CFLAGS
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if test -z "$CFLAGS"; then
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CFLAGS="-O3"
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@ -372,6 +396,7 @@ echo "make $make"
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echo "CPU $cpu"
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echo "Big Endian $bigendian"
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echo "MMX enabled $mmx"
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echo "MMI enabled $mmi"
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echo "AltiVec enabled $altivec"
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echo "gprof enabled $gprof"
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echo "zlib enabled $zlib"
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@ -411,6 +436,9 @@ elif test "$cpu" = "alpha" ; then
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elif test "$cpu" = "powerpc" ; then
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echo "TARGET_ARCH_POWERPC=yes" >> config.mak
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echo "#define ARCH_POWERPC 1" >> $TMPH
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elif test "$cpu" = "mips" ; then
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echo "TARGET_ARCH_MIPS=yes" >> config.mak
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echo "#define ARCH_MIPS 1" >> $TMPH
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fi
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if test "$bigendian" = "yes" ; then
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echo "WORDS_BIGENDIAN=yes" >> config.mak
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@ -420,6 +448,10 @@ if test "$mmx" = "yes" ; then
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echo "TARGET_MMX=yes" >> config.mak
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echo "#define HAVE_MMX 1" >> $TMPH
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fi
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if test "$mmi" = "yes" ; then
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echo "TARGET_MMI=yes" >> config.mak
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echo "#define HAVE_MMI 1" >> $TMPH
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fi
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if test "$altivec" = "yes" ; then
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echo "TARGET_ALTIVEC=yes" >> config.mak
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echo "#define HAVE_ALTIVEC 1" >> $TMPH
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@ -76,6 +76,10 @@ ifeq ($(TARGET_ARCH_POWERPC),yes)
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OBJS += ppc/dsputil_ppc.o
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endif
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ifeq ($(TARGET_MMI),yes)
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OBJS += ps2/dsputil_mmi.o ps2/idct_mmi.o
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endif
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ifeq ($(TARGET_ALTIVEC),yes)
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CFLAGS += -faltivec
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OBJS += ppc/dsputil_altivec.o
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@ -133,6 +137,7 @@ clean:
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mlib/*.o mlib/*~ \
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alpha/*.o alpha/*~ \
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ppc/*.o ppc/*~ \
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ps2/*.o ps2/*~ \
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liba52/*.o liba52/*~ \
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apiexample $(TESTS)
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@ -1652,6 +1652,10 @@ void dsputil_init(void)
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#ifdef ARCH_POWERPC
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dsputil_init_ppc();
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#endif
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#ifdef HAVE_MMI
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dsputil_init_mmi();
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use_permuted_idct = 0;
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#endif
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#ifdef SIMPLE_IDCT
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if (ff_idct == NULL) {
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@ -187,6 +187,14 @@ void dsputil_init_alpha(void);
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void dsputil_init_ppc(void);
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#elif defined(HAVE_MMI)
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#define emms_c()
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#define __align8 __attribute__ ((aligned (16)))
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void dsputil_init_mmi(void);
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#else
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#define emms_c()
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@ -0,0 +1,115 @@
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/*
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* MMI optimized DSP utils
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* Copyright (c) 2000, 2001 Fabrice Bellard.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* MMI optimization by Leon van Stuivenberg <leonvs@iae.nl>
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*/
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#include "../dsputil.h"
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void ff_mmi_idct(DCTELEM * block);
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#include "mmi.h"
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static void clear_blocks_mmi(DCTELEM * blocks)
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{
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/* $4 = blocks */
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int i;
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for (i = 0; i < 6; i++) {
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sq($0, 0, $4);
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sq($0, 16, $4);
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sq($0, 32, $4);
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sq($0, 48, $4);
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sq($0, 64, $4);
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sq($0, 80, $4);
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sq($0, 96, $4);
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sq($0, 112, $4);
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__asm__ __volatile__("addi $4, $4, 128");
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}
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}
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static void put_pixels_clamped_mmi(const DCTELEM * block, UINT8 * pixels,
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int line_size)
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{
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/* $4 = block, $5 = pixels, $6 = line_size */
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__asm__ __volatile__("li $11, 255":::"$11");
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lq($4, 0, $12);
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pcpyld($11, $11, $11);
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pcpyh($11, $11);
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#define PUT(rs) \
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ppacb($0, $##rs, $##rs); \
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sd3(rs, 0, 5); \
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__asm__ __volatile__ ("add $5, $5, $6");
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pminh($12, $11, $12);
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pmaxh($12, $0, $12);
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lq($4, 16, $13);
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PUT(12);
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pminh($13, $11, $13);
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pmaxh($13, $0, $13);
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lq($4, 32, $12);
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PUT(13);
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pminh($12, $11, $12);
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pmaxh($12, $0, $12);
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lq($4, 48, $13);
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PUT(12);
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pminh($13, $11, $13);
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pmaxh($13, $0, $13);
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lq($4, 64, $12);
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PUT(13);
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pminh($12, $11, $12);
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pmaxh($12, $0, $12);
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lq($4, 80, $13);
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PUT(12);
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pminh($13, $11, $13);
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pmaxh($13, $0, $13);
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lq($4, 96, $12);
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PUT(13);
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pminh($12, $11, $12);
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pmaxh($12, $0, $12);
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lq($4, 112, $13);
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PUT(12);
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pminh($13, $11, $13);
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pmaxh($13, $0, $13);
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PUT(13);
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}
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/* todo
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static void add_pixels_clamped_mmi(const DCTELEM * block, UINT8 * pixels,
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int line_size)
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{
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}
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*/
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void dsputil_init_mmi(void)
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{
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put_pixels_clamped = put_pixels_clamped_mmi;
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//add_pixels_clamped = add_pixels_clamped_mmi;
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clear_blocks = clear_blocks_mmi;
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ff_idct = ff_mmi_idct;
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}
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@ -0,0 +1,241 @@
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/*
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Originally provided by Intel at AP-922
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http://developer.intel.com/vtune/cbts/strmsimd/922down.htm
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(See more app notes at http://developer.intel.com/vtune/cbts/strmsimd/appnotes.htm)
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but in a limited edition.
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column code adapted from peter gubanov
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Copyright (c) 2000-2001 Peter Gubanov <peter@elecard.net.ru>
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http://www.elecard.com/peter/idct.shtml
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Rounding trick Copyright (c) 2000 Michel Lespinasse <walken@zoy.org>
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mmi port by leonvs@iae.nl
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*/
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#include "../common.h"
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#include "mmi.h"
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#define BITS_INV_ACC 5 // 4 or 5 for IEEE
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#define SHIFT_INV_ROW (16 - BITS_INV_ACC)
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#define SHIFT_INV_COL (BITS_INV_ACC) //(1 + BITS_INV_ACC) no, FP15 is used
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#define Rounder_0 0
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#define Rounder_1 16
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#define Rounder_2 32
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#define Rounder_3 48
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#define Rounder_4 64
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#define Rounder_5 80
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#define Rounder_6 96
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#define Rounder_7 112
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// assume SHIFT_INV_ROW == 11
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static int roundertable[8][4] align16 = {
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{65535, 65535, 65535, 65535},
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{ 1023, 1023, 1023, 1023},
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{ 1023, 1023, 1023, 1023},
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{ 1023, 1023, 1023, 1023},
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{ 0, 0, 0, 0},
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{ 1023, 1023, 1023, 1023},
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{ 1023, 1023, 1023, 1023},
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{ 1023, 1023, 1023, 1023}
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};
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#define TAB_i_04 0
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#define TAB_i_17 64
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#define TAB_i_26 128
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#define TAB_i_35 192
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static short rowtable[4][32] align16 = {
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{
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16384, 16384, 22725, 12873, 21407, 8867, 19266, 4520,
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16384, -16383, 19266, -22724, 8867, -21406, -4519, -12872,
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16384, -16383, 12873, 4520, -8866, 21407, -22724, 19266,
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16384, 16384, 4520, 19266, -21406, -8866, -12872, -22724},
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{
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22725, 22725, 31521, 17855, 29692, 12299, 26722, 6270,
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22725, -22724, 26722, -31520, 12299, -29691, -6269, -17854,
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22725, -22724, 17855, 6270, -12298, 29692, -31520, 26722,
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22725, 22725, 6270, 26722, -29691, -12298, -17854, -31520},
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{
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21407, 21407, 29692, 16819, 27969, 11585, 25172, 5906,
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21407, -21406, 25172, -29691, 11585, -27968, -5905, -16818,
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21407, -21406, 16819, 5906, -11584, 27969, -29691, 25172,
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21407, 21407, 5906, 25172, -27968, -11584, -16818, -29691},
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{
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19266, 19266, 26722, 15137, 25172, 10426, 22654, 5315,
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19266, -19265, 22654, -26721, 10426, -25171, -5314, -15136,
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19266, -19265, 15137, 5315, -10425, 25172, -26721, 22654,
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19266, 19266, 5315, 22654, -25171, -10425, -15136, -26721}
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};
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#define TG_3_16_minus_one 0
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#define ONE_plus_tg_3_16 16
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#define ONE_plus_tg_1_16 32
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#define TG_1_16_minus_one 48
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#define TG_2_16_minus_one 64
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#define ONE_plus_tg_2_16 80
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#define ZERO_ocos_4_16 96
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#define TG1 6518
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#define TG2 13573
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#define TG3 21895
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#define MN1 -32768
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#define PL1 32768
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#define CS4 23170
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static short coltable[7][8] align16 = {
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{ MN1, TG3, MN1, TG3, MN1, TG3, MN1, TG3},
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{-TG3, -PL1, -TG3, -PL1, -TG3, -PL1, -TG3, -PL1},
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{-TG1, -PL1, -TG1, -PL1, -TG1, -PL1, -TG1, -PL1},
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{ MN1, TG1, MN1, TG1, MN1, TG1, MN1, TG1},
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{ MN1, TG2, MN1, TG2, MN1, TG2, MN1, TG2},
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{-TG2, -PL1, -TG2, -PL1, -TG2, -PL1, -TG2, -PL1},
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{ CS4, 0, CS4, 0, CS4, 0, CS4, 0}
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};
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#define noprevh(rt, rd)
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#define DCT_8_INV_ROW1(rowoff, taboff, rounder, outreg) { \
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\
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lq($4, rowoff, $16); /* r16 = x7 x6 x5 x4 x3 x2 x1 x0 */ \
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lq($24, 0+taboff, $17); /* r17 = w19 w17 w3 w1 w18 w16 w2 w0 */ \
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pinth($16, $16, $16); /* r16 = x7 x3 x6 x2 x5 x1 x4 x0 */ \
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phmadh($17, $16, $17); /* r17 = (x7*w19+x3*w17)b0'' (x6*w3+x2*w1)a0'' (x5*w18+x1*w16)b0' (x4*w2+x0*w0)a0' */ \
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lq($24, 16+taboff, $18);/* r18 = w23 w21 w7 w5 w22 w20 w6 w4 */ \
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lq($24, 32+taboff, $19);/* r19 = w27 w25 w11 w9 w26 w24 w10 w8 */ \
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lq($24, 48+taboff, $20);/* r20 = w31 w29 w15 w13 w30 w28 w14 w12 */ \
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phmadh($18, $16, $18); /* r18 = (b1'')(a1'')(b1')(a1') */ \
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pcpyud($17, $17, $21); /* r21 = (b0'')(a0'')(b0'')(a0'') */ \
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paddw($17, $21, $17); /* r17 = (--)(--)(b0)(a0) */ \
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phmadh($19, $16, $19); /* r19 = (b2'')(a2'')(b2')(a2') */ \
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pcpyud($18, $18, $21); /* r21 = (b1'')(a1'')(b1'')(a1'') */ \
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paddw($18, $21, $18); /* r18 = (--)(--)(b1)(a1) */ \
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pcpyud($19, $19, $21); \
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phmadh($20, $16, $20); /* r12 = (b3'')(a3'')(b3')(a3') */ \
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lq($7, rounder, $22); /* r22 = rounder */ \
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paddw($19, $21, $19); /* r19 = (--)(--)(b2)(a2) */ \
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pextlw($19, $17, $16); /* r16 = (b2)(b0)(a2)(a0) */ \
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pcpyud($20, $20, $21); \
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paddw($20, $21, $20); /* r20 = (--)(--)(b3)(a3) */ \
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pextlw($20, $18, $17); /* r17 = (b3)(b1)(a3)(a1) */ \
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pextlw($17, $16, $20); /* r20 = (a3)(a2)(a1)(a0)" */ \
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pextuw($17, $16, $21); /* r21 = (b3)(b2)(b1)(b0) */ \
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paddw($20, $22, $20); /* r20 = (a3)(a2)(a1)(a0) */\
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paddw($20, $21, $17); /* r17 = ()()()(a0+b0) */ \
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psubw($20, $21, $18); /* r18 = ()()()(a0-b0) */ \
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psraw($17, SHIFT_INV_ROW, $17); /* r17 = (y3 y2 y1 y0) */ \
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psraw($18, SHIFT_INV_ROW, $18); /* r18 = (y4 y5 y6 y7) */ \
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ppach($18, $17, outreg);/* out = y4 y5 y6 y7 y3 y2 y1 y0 Note order */ \
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}
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#define DCT_8_INV_COL4(pextop, blkoff, revop) { \
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lq($24, TG_3_16_minus_one, $2); /* r2 = (tn3)(-1) x 4 */ \
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pextop($11, $13, $3); /* r3 = (x3)(x5) x 4 */ \
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lq($24, ONE_plus_tg_3_16, $16); /* r16 = -((+1)(tn3)) x 4 */ \
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phmadh($3, $2, $17); /* r17 = (tm35) x 4 */ \
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lq($24, ONE_plus_tg_1_16, $2); /* r2 = -((+1)(tn1)) x 4 */ \
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phmadh($3, $16, $18); /* r18 = -(tp35) x 4 */ \
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lq($24, TG_1_16_minus_one, $16);/* r16 = (tn1)(-1) x 4 */ \
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pextop($9, $15, $3); /* r3 = (x1)(x7) x 4 */ \
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phmadh($3, $2, $19); \
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lq($24, ZERO_ocos_4_16, $2); /* r2 = (0)(cos4) x 4 */ \
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phmadh($3, $16, $20); /* r20 = (tm17) x 4 */ \
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psubw($0, $19, $19); /* r19 = (tp17) x 4 */ \
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paddw($19, $18, $3); /* r3 = t1 */ \
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paddw($20, $17, $16); /* r16 = t2 */ \
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psubw($20, $17, $23); /* r23 = b3 */ \
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psubw($19, $18, $20); /* r20 = b0 */ \
|
||||
paddw($3, $16, $17); /* (t1+t2) */ \
|
||||
psubw($3, $16, $18); /* (t1-t2) */ \
|
||||
psraw($17, 15, $17); \
|
||||
lq($24, TG_2_16_minus_one, $3); /* r3 = (tn2)(-1) x 4 */ \
|
||||
pmulth($17, $2, $21); /* r21 = b1 */ \
|
||||
psraw($18, 15, $18); \
|
||||
lq($24, ONE_plus_tg_2_16, $16); /* r16 = -((+1)(tn2)) x 4 */ \
|
||||
pmulth($18, $2, $22); /* r22 = b2 */ \
|
||||
\
|
||||
pextop($10, $14, $2); /* r2 = (x2)(x6) x 4 */ \
|
||||
phmadh($2, $3, $18); /* r18 = (tm26) x 4 */ \
|
||||
phmadh($2, $16, $19); /* r19 = -(tp26) x 4 */ \
|
||||
pextop($8, $0, $17); /* r17 = (x0)(0) x 4 */ \
|
||||
psraw($17, 1, $17); \
|
||||
pextop($12, $0, $16); /* r16 = (x4)(0) x 4 */ \
|
||||
psraw($16, 1, $16); \
|
||||
paddw($17, $16, $2); /* r2 = tp04 */ \
|
||||
psubw($17, $16, $3); /* r3 = tm04 */ \
|
||||
psubw($2, $19, $16); /* r16 = a0 */ \
|
||||
paddw($3, $18, $17); /* r17 = a1 */ \
|
||||
psubw($3, $18, $18); /* r18 = a2 */ \
|
||||
paddw($2, $19, $19); /* r19 = a3 */ \
|
||||
\
|
||||
paddw($16, $20, $2); /* y0 a0+b0 */ \
|
||||
psubw($16, $20, $16); /* y7 a0-b0 */ \
|
||||
psraw($2, SHIFT_INV_COL+16, $2); \
|
||||
psraw($16, SHIFT_INV_COL+16, $16); \
|
||||
ppach($0, $2, $2); \
|
||||
ppach($0, $16, $16); \
|
||||
revop($2, $2); \
|
||||
revop($16, $16); \
|
||||
sd3(2, 0+blkoff, 4); \
|
||||
sd3(16, 112+blkoff, 4); \
|
||||
\
|
||||
paddw($17, $21, $3); /* y1 a1+b1 */ \
|
||||
psubw($17, $21, $17); /* y6 a1-b1 */ \
|
||||
psraw($3, SHIFT_INV_COL+16, $3); \
|
||||
psraw($17, SHIFT_INV_COL+16, $17); \
|
||||
ppach($0, $3, $3); \
|
||||
ppach($0, $17, $17); \
|
||||
revop($3, $3); \
|
||||
revop($17, $17); \
|
||||
sd3(3, 16+blkoff, 4); \
|
||||
sd3(17, 96+blkoff, 4); \
|
||||
\
|
||||
paddw($18, $22, $2); /* y2 a2+b2 */ \
|
||||
psubw($18, $22, $18); /* y5 a2-b2 */ \
|
||||
psraw($2, SHIFT_INV_COL+16, $2); \
|
||||
psraw($18, SHIFT_INV_COL+16, $18); \
|
||||
ppach($0, $2, $2); \
|
||||
ppach($0, $18, $18); \
|
||||
revop($2, $2); \
|
||||
revop($18, $18); \
|
||||
sd3(2, 32+blkoff, 4); \
|
||||
sd3(18, 80+blkoff, 4); \
|
||||
\
|
||||
paddw($19, $23, $3); /* y3 a3+b3 */ \
|
||||
psubw($19, $23, $19); /* y4 a3-b3 */ \
|
||||
psraw($3, SHIFT_INV_COL+16, $3); \
|
||||
psraw($19, SHIFT_INV_COL+16, $19); \
|
||||
ppach($0, $3, $3); \
|
||||
ppach($0, $19, $19); \
|
||||
revop($3, $3); \
|
||||
revop($19, $19); \
|
||||
sd3(3, 48+blkoff, 4); \
|
||||
sd3(19, 64+blkoff, 4); \
|
||||
}
|
||||
|
||||
|
||||
void ff_mmi_idct(int16_t * block)
|
||||
{
|
||||
/* $4 = block */
|
||||
__asm__ __volatile__("la $24, %0"::"m"(rowtable[0][0]));
|
||||
__asm__ __volatile__("la $7, %0"::"m"(roundertable[0][0]));
|
||||
DCT_8_INV_ROW1(0, TAB_i_04, Rounder_0, $8);
|
||||
DCT_8_INV_ROW1(16, TAB_i_17, Rounder_1, $9);
|
||||
DCT_8_INV_ROW1(32, TAB_i_26, Rounder_2, $10);
|
||||
DCT_8_INV_ROW1(48, TAB_i_35, Rounder_3, $11);
|
||||
DCT_8_INV_ROW1(64, TAB_i_04, Rounder_4, $12);
|
||||
DCT_8_INV_ROW1(80, TAB_i_35, Rounder_5, $13);
|
||||
DCT_8_INV_ROW1(96, TAB_i_26, Rounder_6, $14);
|
||||
DCT_8_INV_ROW1(112, TAB_i_17, Rounder_7, $15);
|
||||
|
||||
__asm__ __volatile__("la $24, %0"::"m"(coltable[0][0]));
|
||||
DCT_8_INV_COL4(pextlh, 0, noprevh);
|
||||
DCT_8_INV_COL4(pextuh, 8, prevh);
|
||||
|
||||
//let savedtemp regs be saved
|
||||
__asm__ __volatile__(" ":::"$16", "$17", "$18", "$19", "$20", "$21",
|
||||
"$22", "$23");
|
||||
}
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
#ifndef __mmi_H
|
||||
#define __mmi_H
|
||||
|
||||
#define align16 __attribute__ ((aligned (16)))
|
||||
|
||||
/*
|
||||
#define r0 $zero
|
||||
#define r1 $at //assembler!
|
||||
#define r2 $v0 //return
|
||||
#define r3 $v1 //return
|
||||
#define r4 $a0 //arg
|
||||
#define r5 $a1 //arg
|
||||
#define r6 $a2 //arg
|
||||
#define r7 $a3 //arg
|
||||
#define r8 $t0 //temp
|
||||
#define r9 $t1 //temp
|
||||
#define r10 $t2 //temp
|
||||
#define r11 $t3 //temp
|
||||
#define r12 $t4 //temp
|
||||
#define r13 $t5 //temp
|
||||
#define r14 $t6 //temp
|
||||
#define r15 $t7 //temp
|
||||
#define r16 $s0 //saved temp
|
||||
#define r17 $s1 //saved temp
|
||||
#define r18 $s2 //saved temp
|
||||
#define r19 $s3 //saved temp
|
||||
#define r20 $s4 //saved temp
|
||||
#define r21 $s5 //saved temp
|
||||
#define r22 $s6 //saved temp
|
||||
#define r23 $s7 //saved temp
|
||||
#define r24 $t8 //temp
|
||||
#define r25 $t9 //temp
|
||||
#define r26 $k0 //kernel
|
||||
#define r27 $k1 //kernel
|
||||
#define r28 $gp //global ptr
|
||||
#define r29 $sp //stack ptr
|
||||
#define r30 $fp //frame ptr
|
||||
#define r31 $ra //return addr
|
||||
*/
|
||||
|
||||
|
||||
#define lq(base, off, reg) \
|
||||
__asm__ __volatile__ ("lq " #reg ", %0("#base ")" : : "i" (off) )
|
||||
|
||||
#define lq2(mem, reg) \
|
||||
__asm__ __volatile__ ("lq " #reg ", %0" : : "r" (mem))
|
||||
|
||||
#define sq(reg, off, base) \
|
||||
__asm__ __volatile__ ("sq " #reg ", %0("#base ")" : : "i" (off) )
|
||||
|
||||
/*
|
||||
#define sd(reg, off, base) \
|
||||
__asm__ __volatile__ ("sd " #reg ", " #off "("#base ")")
|
||||
*/
|
||||
//seems assembler has bug encoding mnemonic 'sd', so DIY
|
||||
#define sd3(reg, off, base) \
|
||||
__asm__ __volatile__ (".word %0" : : "i" ( 0xfc000000 | (base<<21) | (reg<<16) | (off)))
|
||||
|
||||
#define sw(reg, off, base) \
|
||||
__asm__ __volatile__ ("sw " #reg ", " #off "("#base ")")
|
||||
|
||||
#define sq2(reg, mem) \
|
||||
__asm__ __volatile__ ("sq " #reg ", %0" : : "m" (*(mem)))
|
||||
|
||||
#define pinth(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pinth " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define phmadh(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("phmadh " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pcpyud(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pcpyud " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pcpyld(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pcpyld " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pcpyh(rt, rd) \
|
||||
__asm__ __volatile__ ("pcpyh " #rd ", " #rt )
|
||||
|
||||
#define paddw(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("paddw " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pextlw(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pextlw " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pextuw(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pextuw " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pextlh(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pextlh " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pextuh(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pextuh " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define psubw(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("psubw " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define psraw(rt, sa, rd) \
|
||||
__asm__ __volatile__ ("psraw " #rd ", " #rt ", %0" : : "i"(sa) )
|
||||
|
||||
#define ppach(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("ppach " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define ppacb(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("ppacb " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define prevh(rt, rd) \
|
||||
__asm__ __volatile__ ("prevh " #rd ", " #rt )
|
||||
|
||||
#define pmulth(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pmulth " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pmaxh(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pmaxh " #rd ", " #rs ", " #rt )
|
||||
|
||||
#define pminh(rs, rt, rd) \
|
||||
__asm__ __volatile__ ("pminh " #rd ", " #rs ", " #rt )
|
||||
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue