mirror of https://git.ffmpeg.org/ffmpeg.git
avcodec/x86/hevc_mc: fix sse register counts
These fix failures of --enable-xmm-clobber-test It would be better to change the code to use fewer registers, but until someone does the used register count must not be too small Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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@ -586,7 +586,7 @@ cglobal hevc_put_hevc_bi_pel_pixels%1_%2, 6, 6, 6, dst, dststride, src, srcstrid
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%macro HEVC_PUT_HEVC_EPEL 2
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%macro HEVC_PUT_HEVC_EPEL 2
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cglobal hevc_put_hevc_epel_h%1_%2, 5, 6, 6, dst, src, srcstride, height, mx, rfilter
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cglobal hevc_put_hevc_epel_h%1_%2, 5, 6, 11, dst, src, srcstride, height, mx, rfilter
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%assign %%stride ((%2 + 7)/8)
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%assign %%stride ((%2 + 7)/8)
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EPEL_FILTER %2, mx, m4, m5
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EPEL_FILTER %2, mx, m4, m5
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.loop
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.loop
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@ -596,7 +596,7 @@ cglobal hevc_put_hevc_epel_h%1_%2, 5, 6, 6, dst, src, srcstride, height, mx, rfi
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LOOP_END dst, src, srcstride
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LOOP_END dst, src, srcstride
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RET
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RET
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cglobal hevc_put_hevc_uni_epel_h%1_%2, 6, 7, 7, dst, dststride, src, srcstride, height, mx, rfilter
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cglobal hevc_put_hevc_uni_epel_h%1_%2, 6, 7, 11, dst, dststride, src, srcstride, height, mx, rfilter
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%assign %%stride ((%2 + 7)/8)
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%assign %%stride ((%2 + 7)/8)
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movdqa m6, [pw_%2]
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movdqa m6, [pw_%2]
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EPEL_FILTER %2, mx, m4, m5
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EPEL_FILTER %2, mx, m4, m5
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@ -611,7 +611,7 @@ cglobal hevc_put_hevc_uni_epel_h%1_%2, 6, 7, 7, dst, dststride, src, srcstride,
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jnz .loop ; height loop
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jnz .loop ; height loop
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RET
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RET
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cglobal hevc_put_hevc_bi_epel_h%1_%2, 7, 8, 7, dst, dststride, src, srcstride, src2, height, mx, rfilter
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cglobal hevc_put_hevc_bi_epel_h%1_%2, 7, 8, 11, dst, dststride, src, srcstride, src2, height, mx, rfilter
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movdqa m6, [pw_bi_%2]
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movdqa m6, [pw_bi_%2]
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EPEL_FILTER %2, mx, m4, m5
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EPEL_FILTER %2, mx, m4, m5
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.loop
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.loop
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@ -634,7 +634,7 @@ cglobal hevc_put_hevc_bi_epel_h%1_%2, 7, 8, 7, dst, dststride, src, srcstride, s
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; int16_t* mcbuffer)
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; int16_t* mcbuffer)
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; ******************************
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; ******************************
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cglobal hevc_put_hevc_epel_v%1_%2, 6, 7, 6, dst, src, srcstride, height, r3src, my, rfilter
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cglobal hevc_put_hevc_epel_v%1_%2, 6, 7, 11, dst, src, srcstride, height, r3src, my, rfilter
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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sub srcq, srcstrideq
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sub srcq, srcstrideq
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EPEL_FILTER %2, my, m4, m5
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EPEL_FILTER %2, my, m4, m5
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@ -645,7 +645,7 @@ cglobal hevc_put_hevc_epel_v%1_%2, 6, 7, 6, dst, src, srcstride, height, r3src,
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LOOP_END dst, src, srcstride
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LOOP_END dst, src, srcstride
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RET
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RET
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cglobal hevc_put_hevc_uni_epel_v%1_%2, 7, 8, 7, dst, dststride, src, srcstride, height, r3src, my, rfilter
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cglobal hevc_put_hevc_uni_epel_v%1_%2, 7, 8, 11, dst, dststride, src, srcstride, height, r3src, my, rfilter
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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movdqa m6, [pw_%2]
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movdqa m6, [pw_%2]
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sub srcq, srcstrideq
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sub srcq, srcstrideq
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@ -662,7 +662,7 @@ cglobal hevc_put_hevc_uni_epel_v%1_%2, 7, 8, 7, dst, dststride, src, srcstride,
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RET
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RET
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cglobal hevc_put_hevc_bi_epel_v%1_%2, 8, 9, 7, dst, dststride, src, srcstride, src2, height, r3src, my, rfilter
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cglobal hevc_put_hevc_bi_epel_v%1_%2, 8, 9, 11, dst, dststride, src, srcstride, src2, height, r3src, my, rfilter
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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movdqa m6, [pw_bi_%2]
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movdqa m6, [pw_bi_%2]
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sub srcq, srcstrideq
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sub srcq, srcstrideq
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@ -689,7 +689,7 @@ cglobal hevc_put_hevc_bi_epel_v%1_%2, 8, 9, 7, dst, dststride, src, srcstride, s
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; ******************************
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; ******************************
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%macro HEVC_PUT_HEVC_EPEL_HV 2
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%macro HEVC_PUT_HEVC_EPEL_HV 2
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cglobal hevc_put_hevc_epel_hv%1_%2, 6, 8, 12 , dst, src, srcstride, height, mx, my, r3src, rfilter
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cglobal hevc_put_hevc_epel_hv%1_%2, 6, 8, 16 , dst, src, srcstride, height, mx, my, r3src, rfilter
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%assign %%stride ((%2 + 7)/8)
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%assign %%stride ((%2 + 7)/8)
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sub srcq, srcstrideq
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sub srcq, srcstrideq
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EPEL_HV_FILTER %2
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EPEL_HV_FILTER %2
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@ -723,7 +723,7 @@ cglobal hevc_put_hevc_epel_hv%1_%2, 6, 8, 12 , dst, src, srcstride, height, mx,
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LOOP_END dst, src, srcstride
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LOOP_END dst, src, srcstride
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RET
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RET
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cglobal hevc_put_hevc_uni_epel_hv%1_%2, 7, 9, 12 , dst, dststride, src, srcstride, height, mx, my, r3src, rfilter
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cglobal hevc_put_hevc_uni_epel_hv%1_%2, 7, 9, 16 , dst, dststride, src, srcstride, height, mx, my, r3src, rfilter
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%assign %%stride ((%2 + 7)/8)
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%assign %%stride ((%2 + 7)/8)
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sub srcq, srcstrideq
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sub srcq, srcstrideq
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EPEL_HV_FILTER %2
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EPEL_HV_FILTER %2
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@ -810,7 +810,7 @@ cglobal hevc_put_hevc_bi_epel_hv%1_%2, 8, 10, 16, dst, dststride, src, srcstride
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; ******************************
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; ******************************
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%macro HEVC_PUT_HEVC_QPEL 2
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%macro HEVC_PUT_HEVC_QPEL 2
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cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 15, dst, src, srcstride, height, mx, rfilter
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cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 16, dst, src, srcstride, height, mx, rfilter
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QPEL_FILTER %2, mx
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QPEL_FILTER %2, mx
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.loop
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.loop
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QPEL_H_LOAD %2, srcq, %1, 10
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QPEL_H_LOAD %2, srcq, %1, 10
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@ -822,7 +822,7 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 15, dst, src, srcstride, height, mx, rf
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LOOP_END dst, src, srcstride
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LOOP_END dst, src, srcstride
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RET
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RET
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cglobal hevc_put_hevc_uni_qpel_h%1_%2, 6, 7, 15 , dst, dststride, src, srcstride, height, mx, rfilter
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cglobal hevc_put_hevc_uni_qpel_h%1_%2, 6, 7, 16 , dst, dststride, src, srcstride, height, mx, rfilter
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movdqa m9, [pw_%2]
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movdqa m9, [pw_%2]
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QPEL_FILTER %2, mx
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QPEL_FILTER %2, mx
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.loop
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.loop
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@ -865,7 +865,7 @@ cglobal hevc_put_hevc_bi_qpel_h%1_%2, 7, 8, 16 , dst, dststride, src, srcstride,
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; int width, int height, int mx, int my)
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; int width, int height, int mx, int my)
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; ******************************
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; ******************************
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cglobal hevc_put_hevc_qpel_v%1_%2, 6, 8, 15, dst, src, srcstride, height, r3src, my, rfilter
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cglobal hevc_put_hevc_qpel_v%1_%2, 6, 8, 16, dst, src, srcstride, height, r3src, my, rfilter
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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QPEL_FILTER %2, my
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QPEL_FILTER %2, my
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.loop
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.loop
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@ -878,7 +878,7 @@ cglobal hevc_put_hevc_qpel_v%1_%2, 6, 8, 15, dst, src, srcstride, height, r3src,
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LOOP_END dst, src, srcstride
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LOOP_END dst, src, srcstride
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RET
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RET
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cglobal hevc_put_hevc_uni_qpel_v%1_%2, 7, 9, 15, dst, dststride, src, srcstride, height, r3src, my, rfilter
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cglobal hevc_put_hevc_uni_qpel_v%1_%2, 7, 9, 16, dst, dststride, src, srcstride, height, r3src, my, rfilter
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movdqa m9, [pw_%2]
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movdqa m9, [pw_%2]
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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QPEL_FILTER %2, my
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QPEL_FILTER %2, my
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@ -924,7 +924,7 @@ cglobal hevc_put_hevc_bi_qpel_v%1_%2, 8, 10, 16, dst, dststride, src, srcstride,
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; int height, int mx, int my)
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; int height, int mx, int my)
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; ******************************
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; ******************************
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%macro HEVC_PUT_HEVC_QPEL_HV 2
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%macro HEVC_PUT_HEVC_QPEL_HV 2
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cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 8, 12, dst, src, srcstride, height, mx, my, r3src, rfilter
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cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 8, 16, dst, src, srcstride, height, mx, my, r3src, rfilter
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lea mxq, [mxq*8-8]
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lea mxq, [mxq*8-8]
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lea myq, [myq*8-8]
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lea myq, [myq*8-8]
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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@ -993,7 +993,7 @@ cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 8, 12, dst, src, srcstride, height, mx, m
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LOOP_END dst, src, srcstride
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LOOP_END dst, src, srcstride
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RET
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RET
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cglobal hevc_put_hevc_uni_qpel_hv%1_%2, 7, 9, 12 , dst, dststride, src, srcstride, height, mx, my, r3src, rfilter
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cglobal hevc_put_hevc_uni_qpel_hv%1_%2, 7, 9, 16 , dst, dststride, src, srcstride, height, mx, my, r3src, rfilter
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lea mxq, [mxq*8-8]
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lea mxq, [mxq*8-8]
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lea myq, [myq*8-8]
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lea myq, [myq*8-8]
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lea r3srcq, [srcstrideq*3]
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lea r3srcq, [srcstrideq*3]
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