mirror of https://git.ffmpeg.org/ffmpeg.git
mmx dct optimization
Originally committed as revision 3100 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Michael Niedermayer
parent
3116cb14d1
commit
77d0e165b1
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@ -60,77 +60,77 @@ struct
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//static const long fdct_r_row_sse2[4] ATTR_ALIGN(16) = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW};
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//static const long fdct_r_row_sse2[4] ATTR_ALIGN(16) = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW};
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static const int16_t tab_frw_01234567[] ATTR_ALIGN(8) = { // forward_dct coeff table
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static const int16_t tab_frw_01234567[] ATTR_ALIGN(8) = { // forward_dct coeff table
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16384, 16384, -8867, -21407,
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16384, 16384, 22725, 19266,
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16384, 16384, 21407, 8867,
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16384, 16384, 12873, 4520,
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16384, -16384, 21407, -8867,
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21407, 8867, 19266, -4520,
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-16384, 16384, 8867, -21407,
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-8867, -21407, -22725, -12873,
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22725, 19266, -22725, -12873,
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16384, -16384, 12873, -22725,
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12873, 4520, 19266, -4520,
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-16384, 16384, 4520, 19266,
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12873, -22725, 19266, -22725,
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8867, -21407, 4520, -12873,
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4520, 19266, 4520, -12873,
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21407, -8867, 19266, -22725,
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22725, 22725, -12299, -29692,
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22725, 22725, 31521, 26722,
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22725, 22725, 29692, 12299,
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22725, 22725, 17855, 6270,
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22725, -22725, 29692, -12299,
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29692, 12299, 26722, -6270,
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-22725, 22725, 12299, -29692,
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-12299, -29692, -31521, -17855,
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31521, 26722, -31521, -17855,
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22725, -22725, 17855, -31521,
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17855, 6270, 26722, -6270,
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-22725, 22725, 6270, 26722,
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17855, -31521, 26722, -31521,
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12299, -29692, 6270, -17855,
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6270, 26722, 6270, -17855,
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29692, -12299, 26722, -31521,
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21407, 21407, -11585, -27969,
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21407, 21407, 29692, 25172,
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21407, 21407, 27969, 11585,
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21407, 21407, 16819, 5906,
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21407, -21407, 27969, -11585,
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27969, 11585, 25172, -5906,
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-21407, 21407, 11585, -27969,
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-11585, -27969, -29692, -16819,
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29692, 25172, -29692, -16819,
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21407, -21407, 16819, -29692,
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16819, 5906, 25172, -5906,
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-21407, 21407, 5906, 25172,
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16819, -29692, 25172, -29692,
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11585, -27969, 5906, -16819,
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5906, 25172, 5906, -16819,
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27969, -11585, 25172, -29692,
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19266, 19266, -10426, -25172,
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19266, 19266, 26722, 22654,
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19266, 19266, 25172, 10426,
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19266, 19266, 15137, 5315,
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19266, -19266, 25172, -10426,
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25172, 10426, 22654, -5315,
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-19266, 19266, 10426, -25172,
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-10426, -25172, -26722, -15137,
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26722, 22654, -26722, -15137,
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19266, -19266, 15137, -26722,
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15137, 5315, 22654, -5315,
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-19266, 19266, 5315, 22654,
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15137, -26722, 22654, -26722,
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10426, -25172, 5315, -15137,
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5315, 22654, 5315, -15137,
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25172, -10426, 22654, -26722,
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16384, 16384, -8867, -21407,
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16384, 16384, 22725, 19266,
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16384, 16384, 21407, 8867,
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16384, 16384, 12873, 4520,
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16384, -16384, 21407, -8867,
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21407, 8867, 19266, -4520,
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-16384, 16384, 8867, -21407,
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-8867, -21407, -22725, -12873,
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22725, 19266, -22725, -12873,
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16384, -16384, 12873, -22725,
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12873, 4520, 19266, -4520,
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-16384, 16384, 4520, 19266,
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12873, -22725, 19266, -22725,
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8867, -21407, 4520, -12873,
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4520, 19266, 4520, -12873,
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21407, -8867, 19266, -22725,
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19266, 19266, -10426, -25172,
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19266, 19266, 26722, 22654,
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19266, 19266, 25172, 10426,
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19266, 19266, 15137, 5315,
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19266, -19266, 25172, -10426,
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25172, 10426, 22654, -5315,
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-19266, 19266, 10426, -25172,
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-10426, -25172, -26722, -15137,
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26722, 22654, -26722, -15137,
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19266, -19266, 15137, -26722,
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15137, 5315, 22654, -5315,
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-19266, 19266, 5315, 22654,
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15137, -26722, 22654, -26722,
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10426, -25172, 5315, -15137,
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5315, 22654, 5315, -15137,
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25172, -10426, 22654, -26722,
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21407, 21407, -11585, -27969,
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21407, 21407, 29692, 25172,
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21407, 21407, 27969, 11585,
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21407, 21407, 16819, 5906,
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21407, -21407, 27969, -11585,
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27969, 11585, 25172, -5906,
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-21407, 21407, 11585, -27969,
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-11585, -27969, -29692, -16819,
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29692, 25172, -29692, -16819,
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21407, -21407, 16819, -29692,
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16819, 5906, 25172, -5906,
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-21407, 21407, 5906, 25172,
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16819, -29692, 25172, -29692,
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11585, -27969, 5906, -16819,
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5906, 25172, 5906, -16819,
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27969, -11585, 25172, -29692,
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22725, 22725, -12299, -29692,
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22725, 22725, 31521, 26722,
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22725, 22725, 29692, 12299,
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22725, 22725, 17855, 6270,
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22725, -22725, 29692, -12299,
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29692, 12299, 26722, -6270,
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-22725, 22725, 12299, -29692,
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-12299, -29692, -31521, -17855,
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31521, 26722, -31521, -17855,
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22725, -22725, 17855, -31521,
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17855, 6270, 26722, -6270,
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-22725, 22725, 6270, 26722,
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17855, -31521, 26722, -31521,
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12299, -29692, 6270, -17855,
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6270, 26722, 6270, -17855,
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29692, -12299, 26722, -31521,
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};
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};
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struct
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struct
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@ -413,93 +413,91 @@ static always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const i
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{
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{
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pshufw_m2r(*(in + 4), mm5, 0x1B);
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pshufw_m2r(*(in + 4), mm5, 0x1B);
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movq_m2r(*(in + 0), mm0);
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movq_m2r(*(in + 0), mm0);
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movq_r2r(mm0, mm1);
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movq_r2r(mm0, mm1);
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paddsw_r2r(mm5, mm0);
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paddsw_r2r(mm5, mm0);
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psubsw_r2r(mm5, mm1);
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psubsw_r2r(mm5, mm1);
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pshufw_r2r(mm0, mm2, 0x4E);
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movq_r2r(mm0, mm2);
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pshufw_r2r(mm1, mm3, 0x4E);
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punpckldq_r2r(mm1, mm0);
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movq_m2r(*(table + 0), mm4);
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punpckhdq_r2r(mm1, mm2);
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movq_m2r(*(table + 4), mm6);
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movq_m2r(*(table + 0), mm1);
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movq_m2r(*(table + 16), mm5);
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movq_m2r(*(table + 4), mm3);
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movq_m2r(*(table + 8), mm4);
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movq_m2r(*(table + 12), mm5);
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movq_m2r(*(table + 16), mm6);
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movq_m2r(*(table + 20), mm7);
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movq_m2r(*(table + 20), mm7);
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pmaddwd_r2r(mm0, mm1);
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pmaddwd_r2r(mm2, mm3);
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pmaddwd_r2r(mm0, mm4);
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pmaddwd_r2r(mm0, mm4);
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pmaddwd_r2r(mm1, mm5);
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pmaddwd_r2r(mm2, mm5);
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pmaddwd_r2r(mm2, mm6);
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pmaddwd_r2r(mm0, mm6);
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pmaddwd_r2r(mm3, mm7);
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pmaddwd_r2r(mm2, mm7);
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pmaddwd_m2r(*(table + 8), mm0);
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pmaddwd_m2r(*(table + 24), mm0);
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pmaddwd_m2r(*(table + 12), mm2);
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pmaddwd_m2r(*(table + 28), mm2);
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pmaddwd_m2r(*(table + 24), mm1);
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paddd_r2r(mm1, mm3);
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pmaddwd_m2r(*(table + 28), mm3);
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paddd_r2r(mm4, mm5);
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paddd_r2r(mm6, mm4);
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paddd_r2r(mm6, mm7);
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paddd_r2r(mm7, mm5);
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paddd_r2r(mm0, mm2);
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paddd_r2r(mm2, mm0);
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movq_m2r(*fdct_r_row, mm0);
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paddd_r2r(mm3, mm1);
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paddd_r2r(mm0, mm3);
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movq_m2r(*fdct_r_row, mm7);
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paddd_r2r(mm0, mm5);
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paddd_r2r(mm7, mm4);
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paddd_r2r(mm0, mm7);
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paddd_r2r(mm7, mm5);
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paddd_r2r(mm0, mm2);
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paddd_r2r(mm7, mm0);
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psrad_i2r(SHIFT_FRW_ROW, mm3);
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paddd_r2r(mm7, mm1);
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psrad_i2r(SHIFT_FRW_ROW, mm4);
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psrad_i2r(SHIFT_FRW_ROW, mm5);
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psrad_i2r(SHIFT_FRW_ROW, mm5);
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psrad_i2r(SHIFT_FRW_ROW, mm0);
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psrad_i2r(SHIFT_FRW_ROW, mm7);
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psrad_i2r(SHIFT_FRW_ROW, mm1);
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psrad_i2r(SHIFT_FRW_ROW, mm2);
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packssdw_r2r(mm0, mm4);
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packssdw_r2r(mm5, mm3);
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packssdw_r2r(mm1, mm5);
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packssdw_r2r(mm2, mm7);
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movq_r2r(mm4, mm2);
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movq_r2m(mm3, *(out + 0));
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punpcklwd_r2r(mm5, mm4);
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movq_r2m(mm7, *(out + 4));
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punpckhwd_r2r(mm5, mm2);
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movq_r2m(mm4, *(out + 0));
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movq_r2m(mm2, *(out + 4));
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}
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}
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static always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table)
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static always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table)
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{
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{
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//FIXME reorder (i dont have a old mmx only cpu here to benchmark ...)
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movd_m2r(*(in + 6), mm1);
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movd_m2r(*(in + 6), mm1);
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punpcklwd_m2r(*(in + 4), mm1);
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punpcklwd_m2r(*(in + 4), mm1);
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movq_r2r(mm1, mm2);
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movq_r2r(mm1, mm2);
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psrlq_i2r(0x20, mm1);
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psrlq_i2r(0x20, mm1);
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movq_m2r(*(in + 0), mm0);
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movq_m2r(*(in + 0), mm0);
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punpcklwd_r2r(mm2, mm1);
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punpcklwd_r2r(mm2, mm1);
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movq_r2r(mm0, mm5);
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movq_r2r(mm0, mm5);
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paddsw_r2r(mm1, mm0);
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paddsw_r2r(mm1, mm0);
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psubsw_r2r(mm1, mm5);
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psubsw_r2r(mm1, mm5);
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movq_r2r(mm0, mm1);
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movq_r2r(mm0, mm2);
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movq_r2r(mm5, mm6);
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punpckldq_r2r(mm5, mm0);
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punpckldq_r2r(mm5, mm3);
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punpckhdq_r2r(mm5, mm2);
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punpckhdq_r2r(mm3, mm6);
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movq_m2r(*(table + 0), mm1);
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movq_m2r(*(table + 0), mm3);
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movq_m2r(*(table + 4), mm3);
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movq_m2r(*(table + 4), mm4);
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movq_m2r(*(table + 8), mm4);
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punpckldq_r2r(mm0, mm2);
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movq_m2r(*(table + 12), mm5);
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pmaddwd_r2r(mm0, mm3);
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movq_m2r(*(table + 16), mm6);
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punpckhdq_r2r(mm2, mm1);
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movq_m2r(*(table + 16), mm2);
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pmaddwd_r2r(mm1, mm4);
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pmaddwd_m2r(*(table + 8), mm0);
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movq_m2r(*(table + 20), mm7);
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movq_m2r(*(table + 20), mm7);
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pmaddwd_r2r(mm5, mm2);
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pmaddwd_r2r(mm0, mm1);
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paddd_m2r(*fdct_r_row, mm3);
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pmaddwd_r2r(mm2, mm3);
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pmaddwd_r2r(mm6, mm7);
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pmaddwd_r2r(mm0, mm4);
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pmaddwd_m2r(*(table + 12), mm1);
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pmaddwd_r2r(mm2, mm5);
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paddd_r2r(mm4, mm3);
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pmaddwd_r2r(mm0, mm6);
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pmaddwd_m2r(*(table + 24), mm5);
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pmaddwd_r2r(mm2, mm7);
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pmaddwd_m2r(*(table + 28), mm6);
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pmaddwd_m2r(*(table + 24), mm0);
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paddd_r2r(mm7, mm2);
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pmaddwd_m2r(*(table + 28), mm2);
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paddd_m2r(*fdct_r_row, mm0);
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paddd_r2r(mm1, mm3);
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paddd_r2r(mm4, mm5);
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paddd_r2r(mm6, mm7);
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paddd_r2r(mm0, mm2);
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movq_m2r(*fdct_r_row, mm0);
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paddd_r2r(mm0, mm3);
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paddd_r2r(mm0, mm5);
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paddd_r2r(mm0, mm7);
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paddd_r2r(mm0, mm2);
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psrad_i2r(SHIFT_FRW_ROW, mm3);
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psrad_i2r(SHIFT_FRW_ROW, mm3);
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paddd_m2r(*fdct_r_row, mm2);
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paddd_r2r(mm1, mm0);
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paddd_m2r(*fdct_r_row, mm5);
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psrad_i2r(SHIFT_FRW_ROW, mm2);
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paddd_r2r(mm6, mm5);
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psrad_i2r(SHIFT_FRW_ROW, mm0);
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psrad_i2r(SHIFT_FRW_ROW, mm5);
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psrad_i2r(SHIFT_FRW_ROW, mm5);
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packssdw_r2r(mm0, mm3);
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psrad_i2r(SHIFT_FRW_ROW, mm7);
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packssdw_r2r(mm5, mm2);
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psrad_i2r(SHIFT_FRW_ROW, mm2);
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movq_r2r(mm3, mm6);
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packssdw_r2r(mm5, mm3);
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punpcklwd_r2r(mm2, mm3);
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packssdw_r2r(mm2, mm7);
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punpckhwd_r2r(mm2, mm6);
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movq_r2m(mm3, *(out + 0));
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movq_r2m(mm3, *(out + 0));
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movq_r2m(mm6, *(out + 4));
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movq_r2m(mm7, *(out + 4));
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}
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}
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void ff_fdct_mmx(int16_t *block)
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void ff_fdct_mmx(int16_t *block)
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@ -553,7 +551,6 @@ void ff_fdct_sse2(int16_t *block)
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int64_t align_tmp[16] ATTR_ALIGN(8);
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int64_t align_tmp[16] ATTR_ALIGN(8);
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int16_t * const block_tmp= (int16_t*)align_tmp;
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int16_t * const block_tmp= (int16_t*)align_tmp;
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int16_t *block1;
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int16_t *block1;
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int i;
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block1 = block_tmp;
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block1 = block_tmp;
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fdct_col(block, block1, 0);
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fdct_col(block, block1, 0);
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