mirror of https://git.ffmpeg.org/ffmpeg.git
ARM: NEON optimised {put,avg}_h264_chroma_mc[48]
Originally committed as revision 16147 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Måns Rullgård
parent
7eec43289a
commit
1cce897aad
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@ -450,6 +450,7 @@ OBJS-$(HAVE_IWMMXT) += armv4l/dsputil_iwmmxt.o \
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OBJS-$(HAVE_NEON) += armv4l/dsputil_neon.o \
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armv4l/dsputil_neon_s.o \
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armv4l/h264dsp_neon.o \
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armv4l/simple_idct_neon.o \
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OBJS-$(ARCH_BFIN) += bfin/dsputil_bfin.o \
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@ -46,6 +46,12 @@ void ff_put_h264_qpel8_mc00_neon(uint8_t *, uint8_t *, int);
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void ff_avg_h264_qpel16_mc00_neon(uint8_t *, uint8_t *, int);
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void ff_put_h264_chroma_mc8_neon(uint8_t *, uint8_t *, int, int, int, int);
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void ff_put_h264_chroma_mc4_neon(uint8_t *, uint8_t *, int, int, int, int);
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void ff_avg_h264_chroma_mc8_neon(uint8_t *, uint8_t *, int, int, int, int);
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void ff_avg_h264_chroma_mc4_neon(uint8_t *, uint8_t *, int, int, int, int);
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void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx)
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{
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c->put_pixels_tab[0][0] = ff_put_pixels16_neon;
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@ -68,6 +74,12 @@ void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx)
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c->avg_pixels_tab[0][0] = ff_avg_pixels16_neon;
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c->put_h264_chroma_pixels_tab[0] = ff_put_h264_chroma_mc8_neon;
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c->put_h264_chroma_pixels_tab[1] = ff_put_h264_chroma_mc4_neon;
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c->avg_h264_chroma_pixels_tab[0] = ff_avg_h264_chroma_mc8_neon;
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c->avg_h264_chroma_pixels_tab[1] = ff_avg_h264_chroma_mc4_neon;
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c->put_h264_qpel_pixels_tab[0][0] = ff_put_h264_qpel16_mc00_neon;
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c->put_h264_qpel_pixels_tab[1][0] = ff_put_h264_qpel8_mc00_neon;
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@ -0,0 +1,298 @@
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/*
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "asm.S"
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.fpu neon
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/* chroma_mc8(uint8_t *dst, uint8_t *src, int stride, int h, int x, int y) */
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.macro h264_chroma_mc8 avg=0
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push {r4-r7, lr}
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ldrd r4, [sp, #20]
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.if \avg
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mov lr, r0
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.endif
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pld [r1]
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pld [r1, r2]
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muls r7, r4, r5
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rsb r6, r7, r5, lsl #3
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rsb ip, r7, r4, lsl #3
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sub r4, r7, r4, lsl #3
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sub r4, r4, r5, lsl #3
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add r4, r4, #64
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beq 2f
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add r5, r1, r2
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vdup.8 d0, r4
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lsl r4, r2, #1
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vdup.8 d1, ip
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vld1.64 {d4, d5}, [r1], r4
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vdup.8 d2, r6
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vld1.64 {d6, d7}, [r5], r4
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vdup.8 d3, r7
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vext.8 d5, d4, d5, #1
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vext.8 d7, d6, d7, #1
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1: pld [r5]
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vmull.u8 q8, d4, d0
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vmlal.u8 q8, d5, d1
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vld1.64 {d4, d5}, [r1], r4
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vmlal.u8 q8, d6, d2
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vext.8 d5, d4, d5, #1
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vmlal.u8 q8, d7, d3
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vmull.u8 q9, d6, d0
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subs r3, r3, #2
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vmlal.u8 q9, d7, d1
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vmlal.u8 q9, d4, d2
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vmlal.u8 q9, d5, d3
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vrshrn.u16 d16, q8, #6
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vld1.64 {d6, d7}, [r5], r4
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pld [r1]
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vrshrn.u16 d17, q9, #6
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.if \avg
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vld1.64 {d20}, [lr,:64], r2
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vld1.64 {d21}, [lr,:64], r2
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vrhadd.u8 q8, q8, q10
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.endif
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vext.8 d7, d6, d7, #1
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vst1.64 {d16}, [r0,:64], r2
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vst1.64 {d17}, [r0,:64], r2
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bgt 1b
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pop {r4-r7, pc}
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2: tst r6, r6
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add ip, ip, r6
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vdup.8 d0, r4
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vdup.8 d1, ip
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beq 4f
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add r5, r1, r2
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lsl r4, r2, #1
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vld1.64 {d4}, [r1], r4
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vld1.64 {d6}, [r5], r4
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3: pld [r5]
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vmull.u8 q8, d4, d0
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vmlal.u8 q8, d6, d1
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vld1.64 {d4}, [r1], r4
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vmull.u8 q9, d6, d0
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vmlal.u8 q9, d4, d1
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vld1.64 {d6}, [r5], r4
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vrshrn.u16 d16, q8, #6
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vrshrn.u16 d17, q9, #6
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.if \avg
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vld1.64 {d20}, [lr,:64], r2
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vld1.64 {d21}, [lr,:64], r2
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vrhadd.u8 q8, q8, q10
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.endif
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subs r3, r3, #2
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pld [r1]
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vst1.64 {d16}, [r0,:64], r2
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vst1.64 {d17}, [r0,:64], r2
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bgt 3b
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pop {r4-r7, pc}
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4: vld1.64 {d4, d5}, [r1], r2
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vld1.64 {d6, d7}, [r1], r2
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vext.8 d5, d4, d5, #1
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vext.8 d7, d6, d7, #1
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5: pld [r1]
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subs r3, r3, #2
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vmull.u8 q8, d4, d0
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vmlal.u8 q8, d5, d1
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vld1.64 {d4, d5}, [r1], r2
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vmull.u8 q9, d6, d0
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vmlal.u8 q9, d7, d1
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pld [r1]
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vext.8 d5, d4, d5, #1
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vrshrn.u16 d16, q8, #6
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vrshrn.u16 d17, q9, #6
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.if \avg
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vld1.64 {d20}, [lr,:64], r2
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vld1.64 {d21}, [lr,:64], r2
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vrhadd.u8 q8, q8, q10
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.endif
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vld1.64 {d6, d7}, [r1], r2
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vext.8 d7, d6, d7, #1
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vst1.64 {d16}, [r0,:64], r2
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vst1.64 {d17}, [r0,:64], r2
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bgt 5b
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pop {r4-r7, pc}
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.endm
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/* chroma_mc4(uint8_t *dst, uint8_t *src, int stride, int h, int x, int y) */
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.macro h264_chroma_mc4 avg=0
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push {r4-r7, lr}
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ldrd r4, [sp, #20]
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.if \avg
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mov lr, r0
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.endif
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pld [r1]
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pld [r1, r2]
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muls r7, r4, r5
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rsb r6, r7, r5, lsl #3
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rsb ip, r7, r4, lsl #3
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sub r4, r7, r4, lsl #3
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sub r4, r4, r5, lsl #3
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add r4, r4, #64
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beq 2f
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add r5, r1, r2
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vdup.8 d0, r4
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lsl r4, r2, #1
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vdup.8 d1, ip
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vld1.64 {d4}, [r1], r4
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vdup.8 d2, r6
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vld1.64 {d6}, [r5], r4
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vdup.8 d3, r7
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vext.8 d5, d4, d5, #1
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vext.8 d7, d6, d7, #1
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vtrn.32 d4, d5
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vtrn.32 d6, d7
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vtrn.32 d0, d1
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vtrn.32 d2, d3
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1: pld [r5]
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vmull.u8 q8, d4, d0
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vmlal.u8 q8, d6, d2
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vld1.64 {d4}, [r1], r4
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vext.8 d5, d4, d5, #1
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vtrn.32 d4, d5
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vmull.u8 q9, d6, d0
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vmlal.u8 q9, d4, d2
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vld1.64 {d6}, [r5], r4
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vadd.i16 d16, d16, d17
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vadd.i16 d17, d18, d19
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vrshrn.u16 d16, q8, #6
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subs r3, r3, #2
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pld [r1]
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.if \avg
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vld1.32 {d20[0]}, [lr,:32], r2
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vld1.32 {d20[1]}, [lr,:32], r2
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vrhadd.u8 d16, d16, d20
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.endif
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vext.8 d7, d6, d7, #1
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vtrn.32 d6, d7
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vst1.32 {d16[0]}, [r0,:32], r2
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vst1.32 {d16[1]}, [r0,:32], r2
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bgt 1b
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pop {r4-r7, pc}
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2: tst r6, r6
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add ip, ip, r6
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vdup.8 d0, r4
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vdup.8 d1, ip
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vtrn.32 d0, d1
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beq 4f
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vext.32 d1, d0, d1, #1
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add r5, r1, r2
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lsl r4, r2, #1
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vld1.32 {d4[0]}, [r1], r4
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vld1.32 {d4[1]}, [r5], r4
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3: pld [r5]
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vmull.u8 q8, d4, d0
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vld1.32 {d4[0]}, [r1], r4
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vmull.u8 q9, d4, d1
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vld1.32 {d4[1]}, [r5], r4
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vadd.i16 d16, d16, d17
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vadd.i16 d17, d18, d19
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vrshrn.u16 d16, q8, #6
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.if \avg
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vld1.32 {d20[0]}, [lr,:32], r2
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vld1.32 {d20[1]}, [lr,:32], r2
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vrhadd.u8 d16, d16, d20
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.endif
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subs r3, r3, #2
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pld [r1]
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vst1.32 {d16[0]}, [r0,:32], r2
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vst1.32 {d16[1]}, [r0,:32], r2
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bgt 3b
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pop {r4-r7, pc}
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4: vld1.64 {d4}, [r1], r2
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vld1.64 {d6}, [r1], r2
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vext.8 d5, d4, d5, #1
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vext.8 d7, d6, d7, #1
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vtrn.32 d4, d5
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vtrn.32 d6, d7
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5: vmull.u8 q8, d4, d0
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vmull.u8 q9, d6, d0
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subs r3, r3, #2
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vld1.64 {d4}, [r1], r2
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vext.8 d5, d4, d5, #1
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vtrn.32 d4, d5
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vadd.i16 d16, d16, d17
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vadd.i16 d17, d18, d19
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pld [r1]
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vrshrn.u16 d16, q8, #6
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.if \avg
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vld1.32 {d20[0]}, [lr,:32], r2
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vld1.32 {d20[1]}, [lr,:32], r2
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vrhadd.u8 d16, d16, d20
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.endif
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vld1.64 {d6}, [r1], r2
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vext.8 d7, d6, d7, #1
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vtrn.32 d6, d7
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pld [r1]
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vst1.32 {d16[0]}, [r0,:32], r2
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vst1.32 {d16[1]}, [r0,:32], r2
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bgt 5b
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pop {r4-r7, pc}
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.endm
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.text
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.align
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function ff_put_h264_chroma_mc8_neon, export=1
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h264_chroma_mc8
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.endfunc
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function ff_avg_h264_chroma_mc8_neon, export=1
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h264_chroma_mc8 avg=1
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.endfunc
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function ff_put_h264_chroma_mc4_neon, export=1
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h264_chroma_mc4
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.endfunc
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function ff_avg_h264_chroma_mc4_neon, export=1
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h264_chroma_mc4 avg=1
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.endfunc
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