mirror of https://git.ffmpeg.org/ffmpeg.git
avcodec/mips: [loongson] simplify the usage of intermediate variable addr.
Simplify the usage of intermediate variable addr in following functions: 1. ff_put_pixels4_8_mmi 2. ff_put_pixels8_8_mmi 3. ff_put_pixels16_8_mmi 4. ff_avg_pixels16_8_mmi. Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
This commit is contained in:
parent
61eeb40a62
commit
17c635e605
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@ -29,36 +29,35 @@
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void ff_put_pixels4_8_mmi(uint8_t *block, const uint8_t *pixels,
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void ff_put_pixels4_8_mmi(uint8_t *block, const uint8_t *pixels,
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ptrdiff_t line_size, int h)
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ptrdiff_t line_size, int h)
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{
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{
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double ftmp[2];
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double ftmp[4];
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mips_reg addr[2];
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DECLARE_VAR_LOW32;
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DECLARE_VAR_LOW32;
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DECLARE_VAR_ADDRT;
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__asm__ volatile (
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__asm__ volatile (
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PTR_ADDU "%[addr1], %[line_size], %[line_size] \n\t"
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"1: \n\t"
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"1: \n\t"
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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MMI_ULWC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULWC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULWC1(%[ftmp1], %[addr0], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SWC1(%[ftmp0], %[block], 0x00)
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MMI_ULWC1(%[ftmp1], %[pixels], 0x00)
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MMI_SWXC1(%[ftmp1], %[block], %[line_size], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[addr1] \n\t"
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MMI_ULWC1(%[ftmp2], %[pixels], 0x00)
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PTR_ADDU "%[block], %[block], %[addr1] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_ULWC1(%[ftmp3], %[pixels], 0x00)
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_ULWC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULWC1(%[ftmp1], %[addr0], 0x00)
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MMI_SWC1(%[ftmp0], %[block], 0x00)
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MMI_SWXC1(%[ftmp1], %[block], %[line_size], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[addr1] \n\t"
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PTR_ADDU "%[block], %[block], %[addr1] \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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MMI_SWC1(%[ftmp0], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SWC1(%[ftmp1], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SWC1(%[ftmp2], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SWC1(%[ftmp3], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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"bnez %[h], 1b \n\t"
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"bnez %[h], 1b \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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RESTRICT_ASM_LOW32
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RESTRICT_ASM_LOW32
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RESTRICT_ASM_ADDRT
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[addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]),
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[block]"+&r"(block), [pixels]"+&r"(pixels),
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[block]"+&r"(block), [pixels]"+&r"(pixels),
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[h]"+&r"(h)
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[h]"+&r"(h)
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: [line_size]"r"((mips_reg)line_size)
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: [line_size]"r"((mips_reg)line_size)
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@ -69,37 +68,35 @@ void ff_put_pixels4_8_mmi(uint8_t *block, const uint8_t *pixels,
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void ff_put_pixels8_8_mmi(uint8_t *block, const uint8_t *pixels,
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void ff_put_pixels8_8_mmi(uint8_t *block, const uint8_t *pixels,
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ptrdiff_t line_size, int h)
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ptrdiff_t line_size, int h)
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{
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{
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double ftmp[2];
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double ftmp[4];
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mips_reg addr[3];
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DECLARE_VAR_ALL64;
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DECLARE_VAR_ALL64;
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__asm__ volatile (
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__asm__ volatile (
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PTR_ADDU "%[addr1], %[line_size], %[line_size] \n\t"
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"1: \n\t"
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"1: \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp1], %[addr0], 0x00)
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MMI_ULDC1(%[ftmp1], %[pixels], 0x00)
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[addr2], %[block], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp2], %[pixels], 0x00)
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MMI_SDC1(%[ftmp1], %[addr2], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[addr1] \n\t"
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MMI_ULDC1(%[ftmp3], %[pixels], 0x00)
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PTR_ADDU "%[block], %[block], %[addr1] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp1], %[addr0], 0x00)
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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PTR_ADDU "%[addr2], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp1], %[addr2], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[addr1] \n\t"
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PTR_ADDU "%[block], %[block], %[addr1] \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp1], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp2], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp3], %[block], 0x00)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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"bnez %[h], 1b \n\t"
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"bnez %[h], 1b \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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RESTRICT_ASM_ALL64
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RESTRICT_ASM_ALL64
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[addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]),
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[addr2]"=&r"(addr[2]),
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[block]"+&r"(block), [pixels]"+&r"(pixels),
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[block]"+&r"(block), [pixels]"+&r"(pixels),
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[h]"+&r"(h)
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[h]"+&r"(h)
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: [line_size]"r"((mips_reg)line_size)
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: [line_size]"r"((mips_reg)line_size)
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@ -110,45 +107,45 @@ void ff_put_pixels8_8_mmi(uint8_t *block, const uint8_t *pixels,
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void ff_put_pixels16_8_mmi(uint8_t *block, const uint8_t *pixels,
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void ff_put_pixels16_8_mmi(uint8_t *block, const uint8_t *pixels,
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ptrdiff_t line_size, int h)
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ptrdiff_t line_size, int h)
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{
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{
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double ftmp[4];
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double ftmp[8];
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mips_reg addr[2];
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DECLARE_VAR_ALL64;
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DECLARE_VAR_ALL64;
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DECLARE_VAR_ADDRT;
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__asm__ volatile (
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__asm__ volatile (
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PTR_ADDU "%[addr1], %[line_size], %[line_size] \n\t"
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"1: \n\t"
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"1: \n\t"
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULDC1(%[ftmp2], %[pixels], 0x08)
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MMI_ULDC1(%[ftmp2], %[pixels], 0x08)
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MMI_ULDC1(%[ftmp1], %[addr0], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp3], %[addr0], 0x08)
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MMI_ULDC1(%[ftmp1], %[pixels], 0x00)
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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MMI_ULDC1(%[ftmp3], %[pixels], 0x08)
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MMI_SDXC1(%[ftmp1], %[block], %[line_size], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp2], %[block], 0x08)
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MMI_ULDC1(%[ftmp4], %[pixels], 0x00)
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MMI_SDXC1(%[ftmp3], %[block], %[line_size], 0x08)
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MMI_ULDC1(%[ftmp6], %[pixels], 0x08)
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PTR_ADDU "%[pixels], %[pixels], %[addr1] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[block], %[block], %[addr1] \n\t"
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MMI_ULDC1(%[ftmp5], %[pixels], 0x00)
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MMI_ULDC1(%[ftmp7], %[pixels], 0x08)
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULDC1(%[ftmp2], %[pixels], 0x08)
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MMI_ULDC1(%[ftmp1], %[addr0], 0x00)
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MMI_ULDC1(%[ftmp3], %[addr0], 0x08)
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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MMI_SDXC1(%[ftmp1], %[block], %[line_size], 0x00)
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MMI_SDC1(%[ftmp2], %[block], 0x08)
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MMI_SDXC1(%[ftmp3], %[block], %[line_size], 0x08)
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PTR_ADDU "%[pixels], %[pixels], %[addr1] \n\t"
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PTR_ADDU "%[block], %[block], %[addr1] \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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MMI_SDC1(%[ftmp2], %[block], 0x08)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp1], %[block], 0x00)
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MMI_SDC1(%[ftmp3], %[block], 0x08)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp4], %[block], 0x00)
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MMI_SDC1(%[ftmp6], %[block], 0x08)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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MMI_SDC1(%[ftmp5], %[block], 0x00)
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MMI_SDC1(%[ftmp7], %[block], 0x08)
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PTR_ADDU "%[block], %[block], %[line_size] \n\t"
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"bnez %[h], 1b \n\t"
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"bnez %[h], 1b \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
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RESTRICT_ASM_ALL64
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RESTRICT_ASM_ALL64
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RESTRICT_ASM_ADDRT
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[addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]),
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[block]"+&r"(block), [pixels]"+&r"(pixels),
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[block]"+&r"(block), [pixels]"+&r"(pixels),
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[h]"+&r"(h)
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[h]"+&r"(h)
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: [line_size]"r"((mips_reg)line_size)
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: [line_size]"r"((mips_reg)line_size)
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@ -264,65 +261,61 @@ void ff_avg_pixels16_8_mmi(uint8_t *block, const uint8_t *pixels,
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ptrdiff_t line_size, int h)
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ptrdiff_t line_size, int h)
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{
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{
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double ftmp[8];
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double ftmp[8];
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mips_reg addr[3];
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mips_reg addr[1];
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DECLARE_VAR_ALL64;
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DECLARE_VAR_ALL64;
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DECLARE_VAR_ADDRT;
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__asm__ volatile (
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__asm__ volatile (
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PTR_ADDU "%[addr2], %[line_size], %[line_size] \n\t"
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"1: \n\t"
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"1: \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp4], %[pixels], 0x08)
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PTR_ADDU "%[addr1], %[block], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp1], %[addr0], 0x00)
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MMI_ULDC1(%[ftmp5], %[addr0], 0x08)
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MMI_ULDC1(%[ftmp2], %[block], 0x00)
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MMI_ULDC1(%[ftmp6], %[block], 0x08)
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MMI_ULDC1(%[ftmp3], %[addr1], 0x00)
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MMI_ULDC1(%[ftmp7], %[addr1], 0x08)
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"pavgb %[ftmp0], %[ftmp0], %[ftmp2] \n\t"
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"pavgb %[ftmp4], %[ftmp4], %[ftmp6] \n\t"
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"pavgb %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"pavgb %[ftmp5], %[ftmp5], %[ftmp7] \n\t"
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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MMI_SDXC1(%[ftmp1], %[block], %[line_size], 0x00)
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MMI_SDC1(%[ftmp4], %[block], 0x08)
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MMI_SDXC1(%[ftmp5], %[block], %[line_size], 0x08)
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PTR_ADDU "%[pixels], %[pixels], %[addr2] \n\t"
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PTR_ADDU "%[block], %[block], %[addr2] \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp4], %[pixels], 0x08)
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PTR_ADDU "%[addr1], %[block], %[line_size] \n\t"
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MMI_ULDC1(%[ftmp1], %[addr0], 0x00)
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MMI_ULDC1(%[ftmp5], %[addr0], 0x08)
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MMI_ULDC1(%[ftmp2], %[block], 0x00)
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MMI_ULDC1(%[ftmp6], %[block], 0x08)
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MMI_ULDC1(%[ftmp3], %[addr1], 0x00)
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MMI_ULDC1(%[ftmp7], %[addr1], 0x08)
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"pavgb %[ftmp0], %[ftmp0], %[ftmp2] \n\t"
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"pavgb %[ftmp4], %[ftmp4], %[ftmp6] \n\t"
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"pavgb %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"pavgb %[ftmp5], %[ftmp5], %[ftmp7] \n\t"
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MMI_SDC1(%[ftmp0], %[block], 0x00)
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MMI_SDXC1(%[ftmp1], %[block], %[line_size], 0x00)
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MMI_SDC1(%[ftmp4], %[block], 0x08)
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MMI_SDXC1(%[ftmp5], %[block], %[line_size], 0x08)
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PTR_ADDU "%[pixels], %[pixels], %[addr2] \n\t"
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PTR_ADDU "%[block], %[block], %[addr2] \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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PTR_ADDI "%[h], %[h], -0x04 \n\t"
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MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
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MMI_ULDC1(%[ftmp4], %[pixels], 0x08)
|
||||||
|
PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
|
||||||
|
MMI_ULDC1(%[ftmp1], %[pixels], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp5], %[pixels], 0x08)
|
||||||
|
PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
|
||||||
|
MMI_ULDC1(%[ftmp2], %[block], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp6], %[block], 0x08)
|
||||||
|
PTR_ADDU "%[addr0], %[block], %[line_size] \n\t"
|
||||||
|
MMI_ULDC1(%[ftmp3], %[addr0], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp7], %[addr0], 0x08)
|
||||||
|
"pavgb %[ftmp0], %[ftmp0], %[ftmp2] \n\t"
|
||||||
|
"pavgb %[ftmp4], %[ftmp4], %[ftmp6] \n\t"
|
||||||
|
"pavgb %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
|
||||||
|
"pavgb %[ftmp5], %[ftmp5], %[ftmp7] \n\t"
|
||||||
|
MMI_SDC1(%[ftmp0], %[block], 0x00)
|
||||||
|
MMI_SDC1(%[ftmp4], %[block], 0x08)
|
||||||
|
MMI_SDC1(%[ftmp1], %[addr0], 0x00)
|
||||||
|
MMI_SDC1(%[ftmp5], %[addr0], 0x08)
|
||||||
|
PTR_ADDU "%[block], %[addr0], %[line_size] \n\t"
|
||||||
|
|
||||||
|
MMI_ULDC1(%[ftmp0], %[pixels], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp4], %[pixels], 0x08)
|
||||||
|
PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
|
||||||
|
MMI_ULDC1(%[ftmp1], %[pixels], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp5], %[pixels], 0x08)
|
||||||
|
PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
|
||||||
|
MMI_ULDC1(%[ftmp2], %[block], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp6], %[block], 0x08)
|
||||||
|
PTR_ADDU "%[addr0], %[block], %[line_size] \n\t"
|
||||||
|
MMI_ULDC1(%[ftmp3], %[addr0], 0x00)
|
||||||
|
MMI_ULDC1(%[ftmp7], %[addr0], 0x08)
|
||||||
|
"pavgb %[ftmp0], %[ftmp0], %[ftmp2] \n\t"
|
||||||
|
"pavgb %[ftmp4], %[ftmp4], %[ftmp6] \n\t"
|
||||||
|
"pavgb %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
|
||||||
|
"pavgb %[ftmp5], %[ftmp5], %[ftmp7] \n\t"
|
||||||
|
MMI_SDC1(%[ftmp0], %[block], 0x00)
|
||||||
|
MMI_SDC1(%[ftmp4], %[block], 0x08)
|
||||||
|
MMI_SDC1(%[ftmp1], %[addr0], 0x00)
|
||||||
|
MMI_SDC1(%[ftmp5], %[addr0], 0x08)
|
||||||
|
PTR_ADDU "%[block], %[addr0], %[line_size] \n\t"
|
||||||
|
|
||||||
"bnez %[h], 1b \n\t"
|
"bnez %[h], 1b \n\t"
|
||||||
: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
|
: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
|
||||||
[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
|
[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
|
||||||
[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
|
[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
|
||||||
[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
|
[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
|
||||||
RESTRICT_ASM_ALL64
|
RESTRICT_ASM_ALL64
|
||||||
RESTRICT_ASM_ADDRT
|
[addr0]"=&r"(addr[0]),
|
||||||
[addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]),
|
|
||||||
[addr2]"=&r"(addr[2]),
|
|
||||||
[block]"+&r"(block), [pixels]"+&r"(pixels),
|
[block]"+&r"(block), [pixels]"+&r"(pixels),
|
||||||
[h]"+&r"(h)
|
[h]"+&r"(h)
|
||||||
: [line_size]"r"((mips_reg)line_size)
|
: [line_size]"r"((mips_reg)line_size)
|
||||||
|
|
Loading…
Reference in New Issue